Datasheet

 2007-2012 Microchip Technology Inc. DS39778E-page 151
PIC18F87J11 FAMILY
TABLE 11-11: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
RD6/AD6/
PMD6/SCK2/
SCL2
RD6 0 O DIG LATD<6> data output.
1 I ST PORTD<6> data input.
AD6
(2)
x O DIG-3 External Memory Interface, Address/Data Bit 6 output.
(1)
x I TTL External Memory Interface, Data Bit 6 input.
(1)
PMD6
(3)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
SCK2 0 O DIG SPI clock output (MSSP2 module); takes priority over port data.
1 I ST SPI clock input (MSSP2 module).
SCL2 0 ODIGI
2
C™ clock output (MSSP2 module); takes priority over port data.
1 ISTI
2
C clock input (MSSP2 module); input type depends on module
setting.
RD7/AD7/
PMD7/SS2
RD7 0 O DIG LATD<7> data output.
1 I ST PORTD<7> data input.
AD7
(2)
x O DIG External Memory Interface, Address/Data Bit 7 output.
(1)
x I TTL External Memory Interface, Data Bit 7 input.
(1)
PMD7
(3)
x O DIG Parallel Master Port data out.
x I TTL Parallel Master Port data input.
SS2
x I TTL Slave select input for MSSP2 module.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page:
PORTD RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 65
LATD LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0 64
TRISD TRISD7 TRISD6 TRISD5 TRISD4TRISD3TRISD2TRISD1TRISD0 64
PORTG RDPU
REPU RJPU
(1)
RG4 RG3 RG2 RG1 RG0 65
Legend: Shaded cells are not used by PORTD.
Note 1: Unimplemented on 64-pin devices, read as ‘0’.
TABLE 11-10: PORTD FUNCTIONS (CONTINUED)
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
Legend: O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note 1: External Memory Interface I/O takes priority over all other digital and PMP I/O.
2: These bits are available on 80-pin devices only.
3: Default configuration for PMP (PMPMX Configuration bit = 1).