Datasheet

PIC18F87J10 FAMILY
DS39663F-page 238 © 2009 Microchip Technology Inc.
TABLE 19-4: REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 53
PIR1
PSPIF ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF 55
PIE1 PSPIE ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE 55
IPR1 PSPIP ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP 55
PIR2
OSCFIF CMIF — — BCL1IF — TMR3IF CCP2IF 55
PIE2 OSCFIE CMIE — — BCL1IE — TMR3IE CCP2IE 55
IPR2 OSCFIP CMIP — — BCL1IP — TMR3IP CCP2IP 55
PIR3 SSP2IF BCL2IF
RC2IF TX2IF TMR4IF CCP5IF CCP4IF CCP3IF 55
PIE3 SSP2IE BCL2IE RC2IE TX2IE TMR4IE CCP5IE CCP4IE CCP3IE 55
IPR3 SSP2IP BCL2IP RC2IP TX2IP TMR4IP CCP5IP CCP4IP CCP3IP 55
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 56
TRISD
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 56
SSP1BUF MSSP1 Receive Buffer/Transmit Register 54
SSP1ADD MSSP1 Address Register (I
2
C™ Slave mode),
MSSP1 Baud Rate Reload Register (I
2
C Master mode)
57
SSPxCON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 54, 57
SSPxCON2 GCEN ACKSTAT ACKDT/
ADMSK5
ACKEN/
ADMSK4
RCEN/
ADMSK3
PEN/
ADMSK2
RSEN/
ADMSK1
SEN 54, 57
SSPxSTAT SMP CKE D/A PSR/WUA BF 54, 57
SSP2BUF MSSP2 Receive Buffer/Transmit Register 54
SSP2ADD MSSP2 Address Register (I
2
C Slave mode),
MSSP2 Baud Rate Reload Register (I
2
C Master mode)
57
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I
2
C™ mode.