Datasheet

PIC18F87J10 FAMILY
DS39663F-page 10 © 2009 Microchip Technology Inc.
TABLE 1-3: PIC18F6XJ10/6XJ15 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
M
CLR 7 I ST Master Clear (Reset) input. This pin is an active-low Reset
to the device.
OSC1/CLKI
OSC1
CLKI
39
I
I
ST
CMOS
Oscillator crystal or external clock input.
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode; CMOS
otherwise.
External clock source input. Always associated
with pin function OSC1. (See related OSC1/CLKI,
OSC2/CLKO pins.)
OSC2/CLKO
OSC2
CLKO
40
O
O
—
—
Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO which has
1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
24
I/O
I
TTL
Analog
Digital I/O.
Analog input 0.
RA1/AN1
RA1
AN1
23
I/O
I
TTL
Analog
Digital I/O.
Analog input 1.
RA2/AN2/V
REF-
RA2
AN2
V
REF-
22
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog input 2.
A/D reference voltage (low) input.
RA3/AN3/V
REF+
RA3
AN3
V
REF+
21
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog input 3.
A/D reference voltage (high) input.
RA4/T0CKI
RA4
T0CKI
28
I/O
I
ST
ST
Digital I/O.
Timer0 external clock input.
RA5/AN4
RA5
AN4
27
I/O
I
TTL
Analog
Digital I/O.
Analog input 4.
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
I
2
C/SMB = I
2
C™/SMBus input buffer
Note 1: Default assignment for ECCP2/P2A when Configuration bit, CCP2MX, is set.
2: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared.