Datasheet

PIC18F87J10 FAMILY
DS39663F-page 56 © 2009 Microchip Technology Inc.
TRISJ PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISH PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISG PIC18F6XJ1X PIC18F8XJ1X ---1 1111 ---1 1111 ---u uuuu
TRISF PIC18F6XJ1X PIC18F8XJ1X 1111 111- 1111 111- uuuu uuu-
TRISE PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISD PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISC PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISB PIC18F6XJ1X PIC18F8XJ1X 1111 1111 1111 1111 uuuu uuuu
TRISA PIC18F6XJ1X PIC18F8XJ1X --11 1111 --11 1111 --uu uuuu
LATJ
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATH PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATG PIC18F6XJ1X PIC18F8XJ1X ---x xxxx ---u uuuu ---u uuuu
LATF PIC18F6XJ1X PIC18F8XJ1X xxxx xxx- uuuu uuu- uuuu uuu-
LATE PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATD PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATC PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATB PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
LATA PIC18F6XJ1X PIC18F8XJ1X --xx xxxx --uu uuuu --uu uuuu
PORTJ
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
PORTH PIC18F6XJ1X PIC18F8XJ1X 0000 xxxx uuuu uuuu uuuu uuuu
PORTG PIC18F6XJ1X PIC18F8XJ1X 111x xxxx 111u uuuu uuuu uuuu
PORTF PIC18F6XJ1X PIC18F8XJ1X x000 000- x000 000- uuuu uuu-
PORTE PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
PORTD PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
PORTC PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
PORTB PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx uuuu uuuu uuuu uuuu
PORTA PIC18F6XJ1X PIC18F8XJ1X --0x 0000 --0u 0000 --uu uuuu
SPBRGH1 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
BAUDCON1 PIC18F6XJ1X PIC18F8XJ1X 01-0 0-00 01-0 0-00 uu-u u-uu
SPBRG2 PIC18F6XJ1X PIC18F8XJ1X 0000 0000 0000 0000 uuuu uuuu
BAUDCON2 PIC18F6XJ1X PIC18F8XJ1X 01-0 0-00 01-0 0-00 uu-u u-uu
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.