Datasheet

PIC18F87J10 FAMILY
DS39663F-page 398 © 2009 Microchip Technology Inc.
Erase Sequence ........................................................ 90
Erasing ....................................................................... 90
Operation During Code-Protect ................................. 93
Reading ......................................................................89
Table Pointer
Boundaries Based on Operation ........................ 88
Table Pointer Boundaries .......................................... 88
Table Reads and Table Writes .................................. 85
Write Sequence ......................................................... 91
Writing ........................................................................ 91
Unexpected Termination ....................................93
Write Verify ........................................................ 93
FSCM. See Fail-Safe Clock Monitor.
G
GOTO ............................................................................... 314
H
Hardware Multiplier .......................................................... 107
Introduction .............................................................. 107
Operation .................................................................107
Hardware Various Multiply
Performance Comparisons ...................................... 107
I
I/O Ports ........................................................................... 125
Pin Capabilities ........................................................ 125
I
2
C Mode (MSSP)
Acknowledge Sequence Timing ............................... 232
Associated Registers ...............................................238
Baud Rate Generator ............................................... 225
Bus Collision
During a Repeated Start Condition .................. 236
During a Stop Condition ................................... 237
Clock Arbitration .......................................................226
Clock Stretching ....................................................... 218
10-Bit Slave Receive Mode (SEN = 1) ............. 218
10-Bit Slave Transmit Mode ............................. 218
7-Bit Slave Receive Mode (SEN = 1) ............... 218
7-Bit Slave Transmit Mode ............................... 218
Clock Synchronization and the CKP bit ...................219
Effects of a Reset ..................................................... 233
General Call Address Support ................................. 222
I
2
C Clock Rate w/BRG ............................................. 225
Master Mode ............................................................ 223
Operation ......................................................... 224
Reception ......................................................... 229
Repeated Start Condition Timing ..................... 228
Start Condition Timing ..................................... 227
Transmission .................................................... 229
Multi-Master Communication, Bus Collision
and Arbitration .................................................. 233
Multi-Master Mode ................................................... 233
Operation .................................................................209
Read/Write
Bit Information (R/W Bit) ............... 209, 211
Registers .................................................................. 203
Serial Clock (RC3/SCKx/SCLx) ............................... 211
Slave Mode ..............................................................209
Addressing ....................................................... 209
Reception ......................................................... 211
Transmission .................................................... 211
Sleep Operation ....................................................... 233
Stop Condition Timing ..............................................232
INCF .................................................................................314
INCFSZ ............................................................................ 315
In-Circuit Debugger .......................................................... 292
In-Circuit Serial Programming (ICSP) ...................... 281, 292
Indexed Literal Offset Addressing
and Standard PIC18 Instructions ............................. 340
Indexed Literal Offset Mode ............................................. 340
Indirect Addressing ............................................................ 79
INFSNZ ............................................................................ 315
Initialization Conditions for all Registers ...................... 53–57
Instruction Cycle ................................................................ 66
Clocking Scheme ....................................................... 66
Flow/Pipelining ........................................................... 66
Instruction Set .................................................................. 293
ADDLW .................................................................... 299
ADDWF .................................................................... 299
ADDWF (Indexed Literal Offset Mode) .................... 341
ADDWFC ................................................................. 300
ANDLW .................................................................... 300
ANDWF .................................................................... 301
BC ............................................................................ 301
BCF ......................................................................... 302
BN ............................................................................ 302
BNC ......................................................................... 303
BNN ......................................................................... 303
BNOV ...................................................................... 304
BNZ ......................................................................... 304
BOV ......................................................................... 307
BRA ......................................................................... 305
BSF .......................................................................... 305
BSF (Indexed Literal Offset Mode) .......................... 341
BTFSC ..................................................................... 306
BTFSS ..................................................................... 306
BTG ......................................................................... 307
BZ ............................................................................ 308
CALL ........................................................................ 308
CLRF ....................................................................... 309
CLRWDT ................................................................. 309
COMF ...................................................................... 310
CPFSEQ .................................................................. 310
CPFSGT .................................................................. 311
CPFSLT ................................................................... 311
DAW ........................................................................ 312
DCFSNZ .................................................................. 313
DECF ....................................................................... 312
DECFSZ .................................................................. 313
Extended Instructions .............................................. 335
Considerations when Enabling ........................ 340
Syntax .............................................................. 335
Use with MPLAB IDE Tools ............................. 342
General Format ........................................................ 295
GOTO ...................................................................... 314
INCF ........................................................................ 314
INCFSZ .................................................................... 315
INFSNZ .................................................................... 315
IORLW ..................................................................... 316
IORWF ..................................................................... 316
LFSR ....................................................................... 317
MOVF ...................................................................... 317
MOVFF .................................................................... 318
MOVLB .................................................................... 318
MOVLW ................................................................... 319
MOVWF ................................................................... 319
MULLW .................................................................... 320
MULWF .................................................................... 320
NEGF ....................................................................... 321
NOP ......................................................................... 321
Opcode Field Descriptions ....................................... 294