Datasheet

PIC18F87J10 FAMILY
DS39663F-page 208 © 2009 Microchip Technology Inc.
REGISTER 19-6: SSPxADD: MSSP1 and MSSP2 ADDRESS REGISTER
(1)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 ADD<7:0>: MSSP Address bits
Note 1: MSSP1 and MSSP2 Address register in I
2
C Slave mode. MSSP1 and MSSP2 Baud Rate Reload register
in I
2
C Master mode.