Datasheet

2003-2013 Microchip Technology Inc. DS39612C-page 345
PIC18F6525/6621/8525/8621
TABLE 27-13: CAPTURE/COMPARE/PWM REQUIREMENTS (ALL ECCP/CCP MODULES)
FIGURE 27-13: PARALLEL SLAVE PORT TIMING (PIC18F8525/8621)
Param.
No.
Symbol Characteristic Min Max Units Conditions
50 TccL CCPx Input
Low Time
No prescaler 0.5 T
CY + 20 ns
With
prescaler
PIC18F6525/6621/
8525/8621
10 ns
PIC18LF6X2X/8X2X 20 ns
51 TccH CCPx Input
High Time
No prescaler 0.5 T
CY + 20 ns
With
prescaler
PIC18F6525/6621/
8525/8621
10 ns
PIC18LF6X2X/8X2X 20 ns
52 TccP CCPx Input Period 3 T
CY + 40
N
—nsN = prescale
value (1,4 or 16)
53 TccR CCPx Output Rise Time PIC18F6525/6621/
8525/8621
—25ns
PIC18LF6X2X/8X2X 45 ns
54 TccF CCPx Output Fall Time PIC18F6525/6621/
8525/8621
—25ns
PIC18LF6X2X/8X2X 45 ns
Note: Refer to Figure 27-4 for load conditions.
RE2/CS
RE0/RD
RE1/WR
RD7:RD0
62
63
64
65