Datasheet

 2003-2013 Microchip Technology Inc. DS39612C-page 3
PIC18F6525/6621/8525/8621
Pin Diagrams (Cont.’d)
PIC18F8525
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
64 63 62 61
21 22 23 24 25 26 27 28 29 30 31 32
RE2/AD10/CS/P2B
RE3/AD11/P3C
(2)
RE4/AD12/P3B
(2)
RE5/AD13/P1C
(2)
RE6/AD14/P1B
(2)
RE7/AD15/ECCP2
(1)
/P2A
(1)
RD0/AD0/PSP0 V
DD
VSS RD1/AD1/PSP1 RD2/AD2/PSP2 RD3/AD3/PSP3 RD4/AD4/PSP4 RD5/AD5/PSP5 RD6/AD6/PSP6 RD7/AD7/PSP7
RE1/AD9/WR/P2C
RE0/AD8/RD
/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
MCLR
/VPP/RG5
(3)
RG4/CCP5/P1D
VSS
VDD
RF7/SS
RB0/INT0/FLT0
RB1/INT1
RB2/INT2
RB3/INT3/ECCP2
(1)
/P2A
(1)
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
V
SS
OSC2/CLKO/RA6
OSC1/CLKI
V
DD
RB7/KBI3/PGD
RC4/SDI/SDA
RC3/SCK/SCL
RC2/ECCP1/P1A
RF0/AN5
RF1/AN6/C2OUT
AV
DD
AVSS
RA3/AN3/VREF+
RA2/AN2/V
REF-
RA1/AN1 RA0/AN0
V
SS
VDD
RA4/T0CKI
RA5/AN4/LVDIN
RC1/T1OSI/ECCP2
(1)
/P2A
(1)
RC0/T1OSO/T13CKI
RC7/RX1/DT1
RC6/TX1/CK1
RC5/SDO
RJ0/ALE RJ1/OE
RH1/A17
RH0/A16
1
2
RH2/A18
RH3/A19
17
18
RH7/AN15/P1B
(2)
RH6/AN14/P1C
(2)
RH5/AN13/P3B
(2)
RH4/AN12/P3C
(2)
RJ5/CE
RJ4/BA0
37
RJ7/UB
RJ6/LB
50
49
RJ2/WRL
RJ3/WRH
19
20
33 34
35 36 38
58
57
56
55
54
53
52
51
60
59
68 67 66 6572 71 70 6974 73
78
77 76 75
79
80
80-Pin TQFP
Note 1: ECCP2/P2A are multiplexed with RC1 when CCP2MX is set; with RE7 when CCP2MX is cleared and the device
is configured in Microcontroller mode; or with RB3 when CCP2MX is cleared in all other program memory modes.
2: P1B/P1C/P3B/P3C are multiplexed with RE6:RE3 when ECCPMX is set and with RH7:RH4 when ECCPMX is
not set.
3: RG5 is multiplexed with MCLR
and is only available when the MCLR Resets are disabled.
RF5/AN10/CVREF
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT
RF6/AN11
PIC18F8621