Datasheet

PIC18F6525/6621/8525/8621
DS39612C-page 240  2003-2013 Microchip Technology Inc.
20.4 Configuring Analog Port Pins
The ADCON1, TRISA, TRISF and TRISH registers
control the operation of the A/D port pins. The port pins
needed as analog inputs must have their corresponding
TRIS bits set (input). If the TRIS bit is cleared (output),
the digital output level (V
OH or VOL) will be converted.
The A/D operation is independent of the state of the
CHS3:CHS0 bits and the TRIS bits.
20.5 A/D Conversions
Figure 20-3 shows the operation of the A/D converter
after the GODONE
bit has been set. Clearing the GO/
DONE
bit during a conversion will abort the current
conversion. The A/D Result register pair will NOT be
updated with the partially completed A/D conversion
sample. That is, the ADRESH:ADRESL registers will
continue to contain the value of the last completed
conversion (or the last value written to the
ADRESH:ADRESL registers). After the A/D conversion
is aborted, a 2 T
AD wait is required before the next
acquisition is started. After this 2 T
AD wait, acquisition
on the selected channel is automatically started.
FIGURE 20-3: A/D CONVERSION TAD CYCLES
Note 1: When reading the port register, all pins
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as a digital input will convert as an
analog input. Analog levels on a digitally
configured input will not affect the
conversion accuracy.
2: Analog levels on any pin defined as a
digital input may cause the input buffer to
consume current out of the device’s
specification limits.
Note: The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
TAD1
TAD2
TAD3 TAD4
TAD5 TAD6
TAD7
TAD8 TAD11
Set GO/DONE bit
Holding capacitor is disconnected from analog input (typically 100 ns)
b9
b8
b7 b6
b5
b4
b3
b2
TAD9
TAD10
b1
b0
TCY - TAD
Next Q4: ADRESH/ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
Conversion starts
b0