Datasheet
2003-2013 Microchip Technology Inc. DS39612C-page 17
PIC18F6525/6621/8525/8621
PORTF is a bidirectional I/O port.
RF0/AN5
RF0
AN5
18 24
I/O
I
ST
Analog
Digital I/O.
Analog input 5.
RF1/AN6/C2OUT
RF1
AN6
C2OUT
17 23
I/O
I
O
ST
Analog
ST
Digital I/O.
Analog input 6.
Comparator 2 output.
RF2/AN7/C1OUT
RF2
AN7
C1OUT
16 18
I/O
I
O
ST
Analog
ST
Digital I/O.
Analog input 7.
Comparator 1 output.
RF3/AN8
RF1
AN8
15 17
I/O
I
ST
Analog
Digital I/O.
Analog input 8.
RF4/AN9
RF1
AN9
14 16
I/O
I
ST
Analog
Digital I/O.
Analog input 9.
RF5/AN10/CV
REF
RF1
AN10
CVREF
13 15
I/O
I
O
ST
Analog
Analog
Digital I/O.
Analog input 10.
Comparator V
REF output.
RF6/AN11
RF6
AN11
12 14
I/O
I
ST
Analog
Digital I/O.
Analog input 11.
RF7/SS
RF7
SS
11 13
I/O
I
ST
TTL
Digital I/O.
SPI™ slave select input.
TABLE 1-2: PIC18F6525/6621/8525/8621 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
PIC18F6X2X PIC18F8X2X
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX (CONFIG3H<0>) is not set (all
Program Memory modes except Microcontroller).
2: Default assignment for ECCP2/P2A when CCP2MX is set (all devices).
3: External memory interface functions are only available on PIC18F8525/8621 devices.
4: Default assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is set and for
all PIC18F6525/6621 devices.
5: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX is not set (Microcontroller mode).
6: PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8525/8621 devices.
7: Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is not set.
8: AV
DD must be connected to a positive supply and AVSS must be connected to a ground reference for proper operation of
the part in user or ICSP™ modes. See parameter D001 for details.
9: RG5 is multiplexed with MCLR
and is only available when the MCLR Resets are disabled.