Datasheet

 2003-2013 Microchip Technology Inc. DS39612C-page 153
PIC18F6525/6621/8525/8621
TABLE 16-2: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
RCON IPEN
— — RI TO PD POR BOR 0--1 11qq 0--q qquu
PIR1
PSPIF
(1)
ADIF RC1IF TX1IF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
PSPIE
(1)
ADIE RC1IE TX1IE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP
(1)
ADIP RC1IP TX1IP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111
PIR2
— CMIF — EEIF BCLIF LVDIF TMR3IF CCP2IF -0-0 0000 ---0 0000
PIE2
— CMIE — EEIE BCLIE LVDIE TMR3IE CCP2IE -0-0 0000 ---0 0000
IPR2
— CMIP — EEIP BCLIP LVDIP TMR3IP CCP2IP -1-1 1111 ---1 1111
PIR3
— — RC2IF TX2IF TMR4IF CCP5IF CCP4IF CCP3IF --00 0000 --00 0000
PIE3
— — RC2IE TX2IE TMR4IE CCP5IE CCP4IE CCP3IE --00 0000 --00 0000
IPR3
— — RC2IP TX2IP TMR4IP CCP5IP CCP4IP CCP3IP --11 1111 --11 1111
TRISB PORTB Data Direction Register 1111 1111 1111 1111
TRISC PORTC Data Direction Register 1111 1111 1111 1111
TRISE PORTE Data Direction Register 1111 1111 1111 1111
TRISG
— — —
PORTG Data Direction Register
---1 1111 ---1 1111
TMR1L Timer1 Register Low Byte xxxx xxxx uuuu uuuu
TMR1H Timer1 Register High Byte xxxx xxxx uuuu uuuu
T1CON RD16
— T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0-00 0000 u-uu uuuu
TMR3H Timer3 Register High Byte xxxx xxxx uuuu uuuu
TMR3L Timer3 Register Low Byte xxxx xxxx uuuu uuuu
T3CON RD16 T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC
TMR3CS TMR3ON 0000 0000 uuuu uuuu
CCPR1L Enhanced Capture/Compare/PWM Register 1 Low Byte xxxx xxxx uuuu uuuu
CCPR1H Enhanced Capture/Compare/PWM Register 1 High Byte xxxx xxxx uuuu uuuu
CCP1CON P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000
CCPR2L Enhanced Capture/Compare/PWM Register 2 Low Byte xxxx xxxx uuuu uuuu
CCPR2H Enhanced Capture/Compare/PWM Register 2 High Byte xxxx xxxx uuuu uuuu
CCP2CON P2M1 P2M0 DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 0000 0000 0000 0000
CCPR3L Enhanced Capture/Compare/PWM Register 3 Low Byte xxxx xxxx uuuu uuuu
CCPR3H Enhanced Capture/Compare/PWM Register 3 High Byte xxxx xxxx uuuu uuuu
CCP3CON P3M1 P3M0 DC3B1 DC3B0 CCP3M3 CCP3M2 CCP3M1 CCP3M0 0000 0000 0000 0000
CCPR4L Capture/Compare/PWM Register 4 Low Byte xxxx xxxx uuuu uuuu
CCPR4H Capture/Compare/PWM Register 4 High Byte xxxx xxxx uuuu uuuu
CCP4CON
— — DC4B1 DC4B0 CCP4M3 CCP4M2 CCP4M1 CCP4M0 --00 0000 --00 0000
CCPR5L Capture/Compare/PWM Register 5 Low Byte xxxx xxxx uuuu uuuu
CCPR5H Capture/Compare/PWM Register 5 High Byte xxxx xxxx uuuu uuuu
CCP5CON
— — DC5B1 DC5B0 CCP5M3 CCP5M2 CCP5M1 CCP5M0 --00 0000 --00 0000
Legend: x = unknown, u = unchanged, — = unimplemented, read as ‘0’.
Shaded cells are not used by Capture and Compare, Timer1 or Timer3.
Note 1: Enabled only in Microcontroller mode for PIC18F8525/8621 devices.