Datasheet

 2009-2011 Microchip Technology Inc. DS39957D-page 161
PIC18F87K90 FAMILY
TABLE 11-3: PORTB FUNCTIONS
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
RB0/INT0/SEG30/
FLT0
RB0 0 O DIG LATB<0> data output.
1 I TTL PORTB<0> data input; weak pull-up when RBPU
bit is cleared.
INT0 1 I ST External Interrupt 0 input.
SEG30 1 O ANA LCD Segment 30 output; disables all other pin functions.
FLT0 x I ST Enhanced PWM Fault input for ECCPx.
RB1/INT1/SEG8 RB1 0 O DIG LATB<1> data output.
1 I TTL PORTB<1> data input; weak pull-up when RBPU
bit is cleared.
INT1 1 I ST External Interrupt 1 input.
SEG8 1 O ANA LCD Segment 8 output; disables all other pin functions.
RB2/INT2/SEG9/
CTED1
RB2 0 O DIG LATB<2> data output.
1 I TTL PORTB<2> data input; weak pull-up when RBPU
bit is cleared.
INT2 1 I ST External Interrupt 2 input.
SEG9 1 O ANA LCD Segment 9 output; disables all other pin functions.
CTED1 x I ST CTMU Edge 1 input.
RB3/INT3/SEG10/
CTED2/ECCP2/
P2A
RB3 0 O DIG LATB<3> data output.
1 I TTL PORTB<3> data input; weak pull-up when RBPU
bit is cleared.
INT3 1 I ST External Interrupt 3 input.
SEG10 1 O ANA LCD Segment 10 output; disables all other pin functions.
CTED2 x I ST CTMU Edge 2 input.
ECCP2 0 O DIG ECCP2 compare output and ECCP2 PWM output. Takes priority
over port data.
1 I ST ECCP2 capture input.
P2A 0 O DIG ECCP2 Enhanced PWM output, Channel A. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority
over port data.
RB4/KBI0/SEG11 RB4 0 O DIG LATB<4> data output.
1 I TTL PORTB<4> data input; weak pull-up when RBPU
bit is cleared.
KBI0 1 I TTL Interrupt-on-pin change.
SEG11 1 O ANA LCD Segment 11 output; disables all other pin functions.
RB5/KBI1/SEG29/
T3CKI/T1G
RB5 0 O DIG LATB<5> data output.
1 I TTL PORTB<5> data input; weak pull-up when RBPU
bit is cleared.
KBI1 1 I TTL Interrupt-on-pin change.
SEG29 1 O ANA LCD Segment 29 output; disables all other pin functions.
T3CKI x I ST Timer3 clock input.
T1G x I ST Timer1 external clock gate input.
RB6/KBI2/PGC RB6 0 O DIG LATB<6> data output.
1 I TTL PORTB<6> data input; weak pull-up when RBPU
bit is cleared.
KBI2 1 I TTL Interrupt-on-pin change.
PGC x I ST Serial execution (ICSP™) clock input for ICSP and ICD operations.
RB7/KBI3/PGD RB7 0 O DIG LATB<7> data output.
1 I TTL PORTB<7> data input; weak pull-up when RBPU
bit is cleared.
KBI3 1 I TTL Interrupt-on-pin change.
PGD x O DIG Serial execution data output for ICSP and ICD operations.
x I ST Serial execution data input for ICSP and ICD operations.
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).