Datasheet

 2009-2011 Microchip Technology Inc. DS39957D-page 15
PIC18F87K90 FAMILY
PORTA is a bidirectional I/O port.
RA0/AN0/ULPWU
RA0
AN0
ULPWU
24
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog Input 0.
Ultra Low-Power Wake-up (ULPW) input.
RA1/AN1/SEG18
RA1
AN1
SEG18
23
I/O
I
O
TTL
Analog
Analog
Digital I/O.
Analog Input 1.
SEG18 output for LCD.
RA2/AN2/V
REF-
RA2
AN2
V
REF-
22
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog Input 2.
A/D reference voltage (low) input.
RA3/AN3/V
REF+
RA3
AN3
V
REF+
21
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog Input 3.
A/D reference voltage (high) input.
RA4/T0CKI/SEG14
RA4
T0CKI
SEG14
28
I/O
I
O
ST
ST
Analog
Digital I/O.
Timer0 external clock input.
SEG14 output for LCD.
RA5/AN4/SEG15/T1CKI/
T3G/HLVDIN
RA5
AN4
SEG15
T1CKI
T3G
HLVDIN
27
I/O
I
O
I
I
I
TTL
Analog
Analog
ST
ST
Analog
Digital I/O.
Analog Input 4.
SEG15 output for LCD.
Timer1 clock input.
Timer3 external clock gate input.
High/Low-Voltage Detect (HLVD) input.
RA6 See the OSC2/CLKO/RA6 pin.
RA7 See the OSC1/CLKI/RA7 pin.
TABLE 1-3: PIC18F6XK90 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
QFN/TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
I
2
C™ = I
2
C/SMBus
Note 1: Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
2: Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
3: Not available on PIC18F65K90 and PIC18F85K90 devices.