Datasheet

 2003-2013 Microchip Technology Inc. DS30491D-page 441
PIC18F6585/8585/6680/8680
FIGURE 27-19: I
2
C BUS START/STOP BITS TIMING
TABLE 27-19: I
2
C BUS START/STOP BITS REQUIREMENTS (SLAVE MODE)
FIGURE 27-20: I
2
C BUS DATA TIMING
Note: Refer to Figure 27-5 for load conditions.
91
92
93
SCL
SDA
Start
Condition
Stop
Condition
90
Param.
No.
Symbol Characteristic Min Max Units Conditions
90 T
SU:STA Start Condition 100 kHz mode 4700 — ns Only relevant for Repeated
Start condition
Setup Time 400 kHz mode 600 —
91 T
HD:STA Start Condition 100 kHz mode 4000 — ns After this period, the first
clock pulse is generated
Hold Time 400 kHz mode 600 —
92 T
SU:STO Stop Condition 100 kHz mode 4700 — ns
Setup Time 400 kHz mode 600 —
93 T
HD:STO Stop Condition 100 kHz mode 4000 — ns
Hold Time 400 kHz mode 600 —
Note: Refer to Figure 27-5 for load conditions.
90
91 92
100
101
103
106
107
109
109
110
102
SCL
SDA
In
SDA
Out
18F8680.book Page 441 Tuesday, January 29, 2013 1:32 PM