Datasheet

PIC18F6585/8585/6680/8680
DS30491D-page 4  2003-2013 Microchip Technology Inc.
Pin Diagrams (Continued)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 6867666564636261
2728 29 30 3132 33 34 35 36 37 38 39 40 41 42 43
Top View
RB0/INT0
RB1/INT1
RB2/INT2
RB3/INT3
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
V
SS
OSC2/CLKO/RA6
OSC1/CLKI
V
DD
RB7/KBI3/PGD
RC4/SDI/SDA
RC3/SCK/SCL
RC2/CCP1/P1A
RE1/WR
RE0/RD
RG0/CANTX1
RG1/CANTX2
RG2/CANRX
RG3
RG5/MCLR
/VPP
RG4/P1D
V
SS
VDD
RF7/SS
RF6/AN11/C1IN-
RF5/AN10/C1IN+/CV
REF
RF4/AN9/C2IN-
RF3/AN8/C2IN+
RF2/AN7/C1OUT
RE2/CS RE3 RE4 RE5/P1C RE6/P1B RE7/CCP2
(1)
RD0/PSP0 V
DD
VSS RD1/PSP1 RD2/PSP2 RD3/PSP3 RD4/PSP4 RD5/PSP5 RD6/PSP6 RD7/PSP7
RF1/AN6/C2OUT
RF0/AN5
AV
DD
AVSS
RA3/AN3/VREF+
RA2/AN2/VREF-
RA1/AN1 RA0/AN0
VDD
RA4/T0CKI
RA5/AN4/LVDIN
RC1/T1OSI/CCP2
(1)
RC0/T1OSO/T13CKI
RC7/RX/DT
RC6/TX/CK
RC5/SDO
N/C
N/C
N/C
N/C
V
SS
PIC18F6X8X
68-Pin PLCC
Note 1: CCP2 pin placement depends on CCP2MX setting.
18F8680.book Page 4 Tuesday, January 29, 2013 1:32 PM