Datasheet

PIC18F6585/8585/6680/8680
DS30491D-page 308 2003-2013 Microchip Technology Inc.
REGISTER 23-42: RXMnSIDL: RECEIVE ACCEPTANCE MASK n STANDARD IDENTIFIER MASK
REGISTERS, LOW BYTE [0 n 1]
REGISTER 23-43: RXMnEIDH: RECEIVE ACCEPTANCE MASK n EXTENDED IDENTIFIER MASK
REGISTERS, HIGH BYTE [0 n 1]
REGISTER 23-44: RXMnEIDL: RECEIVE ACCEPTANCE MASK n EXTENDED IDENTIFIER MASK
REGISTERS, LOW BYTE [0 n 1]
R/W-x R/W-x R/W-x U-0 R/W-0 U-0 R/W-x R/W-x
SID2 SID1 SID0
EXIDEN
(1)
—EID17EID16
bit 7 bit 0
bit 7-5 SID2:SID0: Standard Identifier Mask bits, or Extended Identifier Mask bits EID20:EID18
bit 4 Unimplemented: Read as0
bit 3 Mode 0:
Unimplemented: Read as ‘0
Mode 1, 2
:
EXIDEN: Extended Identifier Filter Enable Mask bit
(1)
1 = Messages selected by EXIDEN bit in RXFnSIDL will be accepted
0 = Both standard and extended identifier messages will be accepted
Note 1: This bit is available in Mode 1 and 2 only.
bit 2 Unimplemented: Read as0
bit 1-0 EID17:EID16: Extended Identifier Mask bits
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8
bit 7 bit 0
bit 7-0 EID15:EID8: Extended Identifier Mask bits
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
R/W-xR/W-xR/W-xR/W-xR/W-xR/W-xR/W-xR/W-x
EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0
bit 7 bit 0
bit 7-0 EID7:EID0: Extended Identifier Mask bits
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
18F8680.book Page 308 Tuesday, January 29, 2013 1:32 PM