Datasheet

PIC18F6585/8585/6680/8680
DS30491D-page 302  2003-2013 Microchip Technology Inc.
REGISTER 23-30: BnEIDL: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
LOW BYTE IN RECEIVE MODE [0  n  5, TXnEN (BSEL<n>) = 0]
(1)
REGISTER 23-31: BnEIDL: TX/RX BUFFER n EXTENDED IDENTIFIER REGISTERS,
LOW BYTE IN TRANSMIT MODE [0  n  5, TXnEN (BSEL<n>) = 1]
(1)
R-x R-x R-x R-x R-x R-x R-x R-x
EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0
bit 7 bit 0
bit 7-0 EID7:EID0: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
EID7 EID6 EID5 EID4 EID3 EID2 EID1 EID0
bit 7 bit 0
bit 7-0 EID7:EID0: Extended Identifier bits
Note 1: These registers are available in Mode 1 and 2 only.
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
18F8680.book Page 302 Tuesday, January 29, 2013 1:32 PM