Datasheet
© 2007 Microchip Technology Inc. DS39629C-page 361
PIC18F6390/6490/8390/8490
Module Differential Currents (ΔIWDT, ΔIBOR, ΔILVD, ΔILCD, ΔIOSCB, ΔIAD)
D025
(ΔI
OSCB)
Timer1 Oscillator 1.0 3.5 μA-10°C
1.1 3.5 μA+25°CV
DD = 2.0V 32 kHz on Timer1
(4)
1.1 4.5 μA+70°C
1.2 4.5 μA-10°C
1.3 4.5 μA+25°CV
DD = 3.0V 32 kHz on Timer1
(4)
1.2 5.5 μA+70°C
1.8 6.0 μA-10°C
1.9 6.0 μA+25°CV
DD = 5.0V 32 kHz on Timer1
(4)
1.9 7.0 μA+70°C
D026
(ΔI
AD)
A/D Converter 1.0 3.0 μA—V
DD = 2.0V A/D on, not converting
1.0 4.0 μA—V
DD = 3.0V
1.0 8.0 μA—VDD = 5.0V
26.2 DC Characteristics: Power-Down and Supply Current
PIC18F6390/6490/8390/8490 (Industrial)
PIC18LF6390/6490/8390/8490 (Industrial) (Continued)
PIC18LF6390/6490/8390/8490
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ T
A ≤ +85°C for industrial
PIC18F6390/6490/8390/8490
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ T
A ≤ +85°C for industrial
Param
No.
Device Typ Max Units Conditions
Legend: Shading of rows is to assist in readability of the table.
Note 1: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured
with the part in Sleep mode, with all I/O pins in high-impedance state and tied to V
DD or VSS and all features that
add delta current disabled (such as WDT, Timer1 Oscillator, BOR, etc.).
2: The supply current is mainly a function of operating voltage, frequency and mode. Other factors, such as I/O pin
loading and switching rate, oscillator type and circuit, internal code execution pattern and temperature, also have
an impact on the current consumption.
The test conditions for all I
DD measurements in active operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to V
DD or VSS;
MCLR
= VDD; WDT enabled/disabled as specified.
3: Low-power Timer1 oscillator selected.
4: BOR and HLVD enable internal band gap reference. With both modules enabled, current consumption will be
less than the sum of both specifications.