Datasheet

© 2007 Microchip Technology Inc. DS39629C-page 227
PIC18F6390/6490/8390/8490
FIGURE 17-7: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
TABLE 17-6: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
RX2/DT2 pin
TX2/CK2 pin
Write to
TXREG2 Reg
TX2IF bit
TRMT bit
bit 0
bit 1
bit 2
bit 6 bit 7
TXEN bit
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 59
PIR3
— LCDIF RC2IF TX2IF — — — —61
PIE3 — LCDIE RC2IE TX2IE — — — —61
IPR3 — LCDIP RC2IP TX2IP — — — —61
RCSTA2 SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 63
TXREG2 AUSART2 Transmit Register 63
TXSTA2 CSRC TX9 TXEN SYNC
— BRGH TRMT TX9D 63
SPBRG2 AUSART2 Baud Rate Generator Register 63
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.