Datasheet
PIC18F6310/6410/8310/8410
DS39635C-page 96 2010 Microchip Technology Inc.
TABLE 8-1: PIC18F8310/8410 EXTERNAL BUS – I/O PORT FUNCTIONS
8.1 Program Memory Modes and the
External Memory Interface
As previously noted, PIC18F8310/8410 devices are
capable of operating in any one of four program mem-
ory modes, using combinations of on-chip and external
program memory. The functions of the multiplexed port
pins depends on the program memory mode selected,
as well as the setting of the EBDIS bit.
In Microcontroller mode, the bus is not active and the
pins have their port functions only. Writes to the
MEMCOM register are not permitted.
In Microprocessor mode, the external bus is always
active and the port pins have only the external bus
function.
In Microprocessor with Boot Block or Extended
Microcontroller mode, the external program memory
bus shares I/O port functions on the pins. When the
device is fetching or doing table read/table write
operations on the external program memory space, the
pins will have the external bus function. If the device is
fetching and accessing internal program memory
locations only, the EBDIS control bit will change the
pins from external memory to I/O port functions. When
EBDIS = 0, the pins function as the external bus. When
EBDIS = 1, the pins function as I/O ports.
If the device fetches or accesses external memory while
EBDIS = 1, the pins will switch to external bus. If the
EBDIS bit is set by a program executing from external
memory, the action of setting the bit will be delayed until
the program branches into the internal memory. At that
time, the pins will change from external bus to I/O ports.
Name Port Bit Function
RD0/AD0/PSP0 PORTD 0 Input/Output or System Bus Address bit 0 or Data bit 0 or Parallel Slave Port bit 0
RD1/AD1/PSP1 PORTD 1 Input/Output or System Bus Address bit 1 or Data bit 1 or Parallel Slave Port bit 1
RD2/AD2/PSP2 PORTD 2 Input/Output or System Bus Address bit 2 or Data bit 2 or Parallel Slave Port bit 2
RD3/AD3/PSP3 PORTD 3 Input/Output or System Bus Address bit 3 or Data bit 3 or Parallel Slave Port bit 3
RD4/AD4/PSP4 PORTD 4 Input/Output or System Bus Address bit 4 or Data bit 4 or Parallel Slave Port bit 4
RD5/AD5/PSP5 PORTD 5 Input/Output or System Bus Address bit 5 or Data bit 5 or Parallel Slave Port bit 5
RD6/AD6/PSP6 PORTD 6 Input/Output or System Bus Address bit 6 or Data bit 6 or Parallel Slave Port bit 6
RD7/AD7/PSP7 PORTD 7 Input/Output or System Bus Address bit 7 or Data bit 7 or Parallel Slave Port bit 7
RE0/AD8/RD
PORTE 0 Input/Output or System Bus Address bit 8 or Data bit 8 or Parallel Slave Port Read Control pin
RE1/AD9/WR
PORTE 1 Input/Output or System Bus Address bit 9 or Data bit 9 or Parallel Slave Port Write Control pin
RE2/AD10/CS
PORTE 2 Input/Output or System Bus Address bit 10 or Data bit 10 or Parallel Slave Port Chip Select pin
RE3/AD11 PORTE 3 Input/Output or System Bus Address bit 11 or Data bit 11
RE4/AD12 PORTE 4 Input/Output or System Bus Address bit 12 or Data bit 12
RE5/AD13 PORTE 5 Input/Output or System Bus Address bit 13 or Data bit 13
RE6/AD14 PORTE 6 Input/Output or System Bus Address bit 14 or Data bit 14
RE7/CCP2
(1)
/AD15 PORTE 7 Input/Output or Capture 2 Input/Compare 2 Output/PWM 2 Output pin or System Bus
Address bit 15 or Data bit 15
RH0/AD16 PORTH 0 Input/Output or System Bus Address bit 16
RH1/AD17 PORTH 1 Input/Output or System Bus Address bit 17
RH2/AD18 PORTH 2 Input/Output or System Bus Address bit 18
RH3/AD19 PORTH 3 Input/Output or System Bus Address bit 19
RJ0/ALE PORTJ 0 Input/Output or System Bus Address Latch Enable (ALE) Control pin
RJ1/OE
PORTJ 1 Input/Output or System Bus Output Enable (OE) Control pin
RJ2/WRL
PORTJ 2 Input/Output or System Bus Write Low (WRL) Control pin
RJ3/WRH
PORTJ 3 Input/Output or System Bus Write High (WRH) Control pin
RJ4/BA0 PORTJ 4 Input/Output or System Bus Byte Address bit 0
RJ5/CE
PORTJ 5 Input/Output or System Bus Chip Enable (CE) Control pin
RJ6/LB
PORTJ 6 Input/Output or System Bus Lower Byte Enable (LB) Control pin
RJ7/UB
PORTJ 7 Input/Output or System Bus Upper Byte Enable (UB) Control pin
Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared (all devices in Microcontroller mode).