Datasheet

PIC18F6310/6410/8310/8410
DS39635C-page 68  2010 Microchip Technology Inc.
6.1.1 PIC18F8310/8410 PROGRAM
MEMORY MODES
In addition to available on-chip Flash program memory,
80-pin devices in this family can also address up to
2 Mbytes of external program memory through an
external memory interface. There are four distinct
operating modes available to the controllers:
• Microprocessor (MP)
• Microprocessor with Boot Block (MPBB)
• Extended Microcontroller (EMC)
• Microcontroller (MC)
The program memory mode is determined by setting
the two Least Significant bits of the CONFIG3L Config-
uration byte, as shown in Register 6-1. (See also
Section 24.1 “Configuration Bits” for additional
details on the device Configuration bits.)
The program memory modes operate as follows:
•The Microcontroller Mode accesses only on-chip
Flash memory. Attempts to read above the physical
limit of the on-chip Flash (3FFFh) causes a read of
all ‘0’s (a NOP instruction). The Microcontroller mode
is also the only operating mode available to
PIC18F6310 and PIC18F6410 devices.
•The Extended Microcontroller Mode allows
access to both internal and external program
memories as a single block. The device can
access its entire on-chip Flash memory; above
this, the device accesses external program
memory up to the 2-Mbyte program space limit.
As with Boot Block mode, execution automatically
switches between the two memories as required.
•The Microprocessor Mode permits access only
to external program memory; the contents of the
on-chip Flash memory is ignored. The 21-bit
program counter permits access to the entire
2-Mbyte linear program memory space.
• The Microprocessor with Boot Block Mode
accesses on-chip Flash memory from addresses
000000h to 0007FFh. Above this, external program
memory is accessed all the way up to the 2-Mbyte
limit. Program execution automatically switches
between the two memories as required.
In all modes, the microcontroller has complete access
to data RAM.
Figure 6-2 compares the memory maps of the different
program memory modes. The differences between
on-chip and external memory access limitations are
more fully explained in Table 6-1.
REGISTER 6-1: CONFIG3L: CONFIGURATION BYTE REGISTER LOW
R/P-1 R/P-1 U-0 U-0 U-0 U-0 R/P-1 R/P-1
WAIT BW
— — — —PM1PM0
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value after erase bit ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 WAIT: External Bus Data Wait Enable bit
1 = Wait selections unavailable, device will not wait
0 = Wait programmed by WAIT1 and WAIT0 bits of MEMCOM register (MEMCOM<5:4>)
bit 6 BW: External Bus Data Width Select bit
1 = 16-bit external bus data width
0 = 8-bit external bus data width
bit 5-2 Unimplemented: Read as ‘0’
bit 1-0 PM<1:0>: Processor Data Memory Mode Select bits
11 = Microcontroller mode
10 = Microprocessor mode
(1)
01 = Microcontroller with Boot Block mode
(1)
00 = Extended Microcontroller mode
(1)
Note 1: This mode is available only on PIC18F8410 devices.