Datasheet

2010 Microchip Technology Inc. DS39635C-page 405
PIC18F6310/6410/8310/8410
PORTF
Associated Registers ............................................... 141
Functions ................................................................. 141
LATF Register .......................................................... 140
PORTF Register ...................................................... 140
TRISF Register ........................................................ 140
PORTG
Associated Registers ............................................... 143
Functions ................................................................. 143
LATG Register ......................................................... 142
PORTG Register ...................................................... 142
TRISG Register ........................................................ 142
PORTH
Associated Registers ............................................... 145
Functions ................................................................. 145
LATH Register ......................................................... 144
PORTH Register ...................................................... 144
TRISH Register ........................................................ 144
PORTJ
Associated Registers ............................................... 147
Functions ................................................................. 147
LATJ Register .......................................................... 146
PORTJ Register ....................................................... 146
TRISJ Register ......................................................... 146
Postscaler, WDT
Assignment (PSA Bit) .............................................. 153
Rate Select (T0PS2:T0PS0 Bits) ............................. 153
Switching Between Timer0 and WDT ...................... 153
Power-Managed Modes ..................................................... 45
and Multiple Sleep Commands .................................. 46
Clock Sources ............................................................ 45
Clock Transitions, Status Indicators ........................... 46
Entering ...................................................................... 45
Exiting Idle and Sleep Modes .................................... 53
by Interrupt ......................................................... 53
by Reset ............................................................. 53
by WDT Time-out ............................................... 53
Without an Oscillator Start-up Delay .................. 53
Idle Modes ................................................................. 50
Operation ................................................................. 105
Run Modes ................................................................. 46
Selecting .................................................................... 45
Sleep Mode ................................................................ 50
Summary (table) ........................................................ 45
Power-on Reset (POR) .............................................. 57, 281
Oscillator Start-up Timer (OST) ................................. 59
Power-up Timer (PWRT) ........................................... 59
Time-out Sequence .................................................... 59
Power-up Delays ................................................................ 43
Power-up Timer (PWRT) ........................................... 43, 281
Prescaler, Capture ........................................................... 170
Prescaler, Timer0 ............................................................. 153
Assignment (PSA Bit) .............................................. 153
Rate Select (T0PS2:T0PS0 Bits) ............................. 153
Switching Between Timer0 and WDT ...................... 153
Prescaler, TMR2 .............................................................. 174
Program Counter ............................................................... 70
PCL, PCH and PCU Registers ................................... 70
PCLATH and PCLATU Registers .............................. 70
Program Memory ............................................................... 89
Code Protection, from Table Reads ......................... 295
Control Registers ....................................................... 90
TABLAT (Table Latch) Register ......................... 90
TBLPTR (Table Pointer) Register ...................... 90
Erasing External Memory (PIC18F8X10) ................... 92
Instructions ................................................................ 74
Two-Word Instructions ....................................... 74
Interrupt Vector .......................................................... 67
Look-up Tables .......................................................... 72
Map and Stack (diagram) .......................................... 67
Memory Access for PIC18F8310/8410 Modes .......... 69
Memory Maps for PIC18FX310/X410 Modes ............ 69
PIC18F8310/8410 Memory Modes ............................ 68
Reset Vector .............................................................. 67
Table Reads and Table Writes .................................. 89
Writing and Erasing On-Chip Program
Memory (ICSP Mode) ........................................ 92
Writing To
Unexpected Termination ................................... 92
Write Verify ........................................................ 92
Writing to Memory Space (PIC18F8X10) .................. 92
Program Memory Modes
Extended Microcontroller ........................................... 96
Microcontroller ........................................................... 96
Microprocessor .......................................................... 96
Microprocessor with Boot Block ................................ 96
Program Verification and Code Protection ...................... 295
Associated Registers ............................................... 295
Programming, Device Instructions ................................... 297
PSP.See Parallel Slave Port.
Pulse-Width Modulation. See PWM (CCP Module).
PUSH ............................................................................... 326
PUSH and POP Instructions .............................................. 71
PUSHL ............................................................................. 342
PWM (CCP Module)
Associated Registers ............................................... 175
Duty Cycle ............................................................... 174
Example Frequencies/Resolutions .......................... 174
Period ...................................................................... 173
Setup for PWM Operation ....................................... 174
TMR2 to PR2 Match ................................................ 173
Q
Q Clock ............................................................................ 174
R
RAM. See Data Memory.
RCALL ............................................................................. 327
RCON Register
Bit Status During Initialization .................................... 62
Reader Response ............................................................ 410
Register File ....................................................................... 77
Register File Summary ................................................ 79–82
Registers
ADCON0 (A/D Control 0) ......................................... 255
ADCON1 (A/D Control 1) ......................................... 256
ADCON2 (A/D Control 2) ......................................... 257
BAUDCON1 (Baud Rate Control 1) ......................... 220
CCPxCON (Capture/Compare/PWM Control) ......... 167
CMCON (Comparator Control) ................................ 265
CONFIG1H (Configuration 1 High Byte) .................. 282
CONFIG2H (Configuration 2 High) .......................... 284
CONFIG3H (Configuration 3 High) .......................... 286
CONFIG3L (Configuration 3 Low) ........................... 285
CONFIG4L (Configuration 4 Low) ........................... 287
CONFIG5L (Configuration 5 Low) ........................... 287
CONFIG7L (Configuration 7 Low) ........................... 288
CVRCON (Comparator Voltage
Reference Control) .......................................... 271
DEVID1 (Device ID 1) .............................................. 289
DEVID2 (Device ID 2) .............................................. 289