Datasheet

 2010 Microchip Technology Inc. DS39635C-page 401
PIC18F6310/6410/8310/8410
Data Memory ..................................................................... 75
Access Bank .............................................................. 77
and the Extended Instruction Set ............................... 86
Bank Select Register (BSR) ....................................... 75
General Purpose Registers ........................................ 77
Map for PIC18F6310/6410/8310/8410 Devices ......... 76
Special Function Registers ........................................ 78
DAW ................................................................................. 316
DC Characteristics ........................................................... 363
Power-Down and Supply Current ............................ 355
Supply Voltage ......................................................... 354
DCFSNZ .......................................................................... 317
DECF ............................................................................... 316
DECFSZ ........................................................................... 317
Development Support ...................................................... 347
Device Differences ........................................................... 395
Device Overview .................................................................. 9
Features (table) .......................................................... 11
New Core Features ...................................................... 9
Device Reset Timers .......................................................... 59
PLL Lock Time-out ..................................................... 59
Power-up Timer (PWRT) ........................................... 59
Time-out Sequence .................................................... 59
Device Reset Timer Oscillator Start-up Timer (OST) ......... 59
Direct Addressing ............................................................... 85
E
Effect on Standard PIC Instructions ................................. 344
Effects of Power-Managed Modes on
Various Clock Sources ............................................... 43
Electrical Characteristics .................................................. 351
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART). See EUSART.
Equations
16 x 16 Signed Multiplication Algorithm ................... 108
16 x 16 Unsigned Multiplication Algorithm ............... 108
A/D Acquisition Time ................................................ 260
A/D Minimum Charging Time ................................... 260
Errata ................................................................................... 7
EUSART
Asynchronous Mode ................................................ 226
12-Bit Break Transmit and Receive ................. 234
Associated Registers, Receive ........................ 231
Associated Registers, Transmit ....................... 228
Auto-Wake-up on Sync Break ......................... 232
Receiver ........................................................... 229
Setting up 9-Bit Mode with Address Detect ..... 229
Transmitter ....................................................... 226
Baud Rate Generator (BRG) .................................... 221
Associated Registers ....................................... 221
Auto-Baud Rate Detect .................................... 224
Baud Rate Error, Calculating ........................... 221
Baud Rates, Asynchronous Modes ................. 222
High Baud Rate Select (BRGH Bit) ................. 221
Operation in Power-Managed Modes .............. 221
Sampling .......................................................... 221
Synchronous Master Mode ...................................... 235
Associated Registers, Receive ........................ 238
Associated Registers, Transmit ....................... 236
Reception ......................................................... 237
Transmission ................................................... 235
Synchronous Slave Mode ........................................ 239
Associated Registers, Receive ........................ 240
Associated Registers, Transmit ....................... 239
Reception ......................................................... 240
Transmission ................................................... 239
Extended Instruction Set
ADDFSR .................................................................. 340
ADDULNK ............................................................... 340
and Using MPLAB IDE Tools .................................. 346
CALLW .................................................................... 341
Considerations for Use ............................................ 344
MOVSF .................................................................... 341
MOVSS .................................................................... 342
PUSHL ..................................................................... 342
SUBFSR .................................................................. 343
SUBULNK ................................................................ 343
External Memory Interface ................................................. 95
16-Bit Byte Select Mode ............................................ 99
16-Bit Byte Write Mode .............................................. 97
16-Bit Mode ............................................................... 97
16-Bit Mode Timing ................................................. 100
16-Bit Word Write Mode ............................................ 98
8-Bit Mode ............................................................... 102
8-Bit Mode Timing ................................................... 103
and the Program Memory Modes .............................. 96
Associated Registers ............................................... 105
PIC18F8310/8410 External Bus,
I/O Port Functions .............................................. 96
F
Fail-Safe Clock Monitor ........................................... 281, 293
Interrupts in Power-Managed Modes ...................... 294
POR or Wake from Sleep ........................................ 294
WDT During Oscillator Failure ................................. 293
Fast Register Stack ........................................................... 72
Firmware Instructions ...................................................... 297
Flash Program Memory
Associated Registers ................................................. 93
Operation During Code-Protect ................................. 92
Reading ..................................................................... 90
FSCM. See Fail-Safe Clock Monitor.
G
GOTO .............................................................................. 318
H
Hardware Multiplier .......................................................... 107
Introduction .............................................................. 107
Operation ................................................................. 107
Performance Comparison ........................................ 107
High/Low-Voltage Detect ................................................. 275
Applications ............................................................. 278
Associated Registers ............................................... 279
Characteristics ......................................................... 367
Current Consumption .............................................. 277
Effects of a Reset .................................................... 279
Operation ................................................................. 276
During Sleep .................................................... 279
Start-up Time ................................................... 277
Setup ....................................................................... 277
Typical Application ................................................... 278
HLVD. See High/Low-Voltage Detect. ............................. 275