Datasheet

2010 Microchip Technology Inc. DS39635C-page 399
PIC18F6310/6410/8310/8410
INDEX
A
A/D ................................................................................... 255
A/D Converter Interrupt, Configuring ....................... 259
Acquisition Requirements ........................................ 260
ADCON0 Register .................................................... 255
ADCON1 Register .................................................... 255
ADCON2 Register .................................................... 255
ADRESH Register ............................................ 255, 258
ADRESL Register .................................................... 255
Analog Port Pins ...................................................... 148
Analog Port Pins, Configuring .................................. 262
Associated Registers ............................................... 264
Calculating the Minimum Required
Acquisition Time .............................................. 260
Configuring the Module ............................................ 259
Conversion Clock (T
AD) ........................................... 261
Conversion Status (GO/DONE
Bit) .......................... 258
Conversions ............................................................. 263
Converter Characteristics ........................................ 387
Discharge ................................................................. 263
Operation in Power-Managed Modes ...................... 262
Selecting, Configuring Automatic
Acquisition Time .............................................. 261
Special Event Trigger (CCP) .................................... 264
Use of the CCP2 Trigger .......................................... 264
Absolute Maximum Ratings ............................................. 351
AC (Timing) Characteristics ............................................. 368
Load Conditions for Device Timing
Specifications ................................................... 369
Parameter Symbology ............................................. 368
Temperature and Voltage Specifications ................. 369
Timing Conditions .................................................... 369
Access Bank ...................................................................... 77
ACKSTAT ........................................................................ 207
ACKSTAT Status Flag ..................................................... 207
ADCON0 Register ............................................................ 255
GO/DONE
Bit ........................................................... 258
ADCON1 Register ............................................................ 255
ADCON2 Register ............................................................ 255
ADDFSR .......................................................................... 340
ADDLW ............................................................................ 303
Addressable Universal Synchronous Asynchronous
Receiver Transmitter (AUSART). See AUSART.
ADDULNK ........................................................................ 340
ADDWF ............................................................................ 303
ADDWFC ......................................................................... 304
ADRESH Register ............................................................ 255
ADRESL Register .................................................... 255, 258
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 304
ANDWF ............................................................................ 305
Assembler
MPASM Assembler .................................................. 348
AUSART
Asynchronous Mode ................................................ 246
Associated Registers, Receive ........................ 249
Associated Registers, Transmit ....................... 247
Receiver ........................................................... 248
Setting up 9-Bit Mode with
Address Detect ........................................ 248
Transmitter ....................................................... 246
Baud Rate Generator (BRG) ................................... 244
Associated Registers ....................................... 244
Baud Rate Error, Calculating ........................... 244
Baud Rates, Asynchronous Modes ................. 245
High Baud Rate Select (BRGH Bit) ................. 244
Operation in Power-Managed Modes .............. 244
Sampling ......................................................... 244
Synchronous Master Mode ...................................... 250
Associated Registers, Receive ........................ 252
Associated Registers, Transmit ....................... 251
Reception ........................................................ 252
Transmission ................................................... 250
Synchronous Slave Mode ........................................ 253
Associated Registers, Receive ........................ 254
Associated Registers, Transmit ....................... 253
Reception ........................................................ 254
Transmission ................................................... 253
Auto-Wake-up on Sync Break Character ......................... 232
B
Bank Select Register (BSR) .............................................. 75
Baud Rate Generator ...................................................... 203
BC .................................................................................... 305
BCF ................................................................................. 306
BF .................................................................................... 207
BF Status Flag ................................................................. 207
Block Diagrams
16-Bit Byte Select Mode ............................................ 99
16-Bit Byte Write Mode .............................................. 97
16-Bit Word Write Mode ............................................ 98
8-Bit Multiplexed Mode ............................................ 102
A/D ........................................................................... 258
Analog Input Model .................................................. 259
AUSART Receive .................................................... 248
AUSART Transmit ................................................... 246
Baud Rate Generator .............................................. 203
Capture Mode Operation ......................................... 169
Comparator
I/O Operating Modes ....................................... 266
Comparator Analog Input Model .............................. 269
Comparator Output .................................................. 268
Comparator Voltage Reference ............................... 272
Comparator Voltage Reference
Output Buffer Example .................................... 273
Compare Mode Operation ....................................... 171
Device Clock .............................................................. 40
EUSART Receive .................................................... 230
EUSART Transmit ................................................... 227
External Clock Input, EC Oscillator ........................... 36
External Clock Input, HS Oscillator ........................... 36
External Power-on Reset Circuit
(Slow V
DD Power-up) ........................................ 57
Fail-Safe Clock Monitor ........................................... 293
Generic I/O Port Operation ...................................... 125
High/Low-Voltage Detect with External Input .......... 276
Interrupt Logic .......................................................... 110
MSSP (I
2
C Master Mode) ........................................ 201
MSSP (I
2
C Mode) .................................................... 186
MSSP (SPI Mode) ................................................... 177
On-Chip Reset Circuit ................................................ 55
PIC18F6310/6410 ..................................................... 12
PIC18F8310/8410 ..................................................... 13
PLL (HS Mode) .......................................................... 37
PORTD and PORTE (Parallel Slave Port) ............... 148
PWM Operation (Simplified) .................................... 173
RC Oscillator Mode ................................................... 37