Datasheet

 2010 Microchip Technology Inc. DS39635C-page 291
PIC18F6310/6410/8310/8410
TABLE 24-2: SUMMARY OF WATCHDOG TIMER REGISTERS
REGISTER 24-11: WDTCON: WATCHDOG TIMER CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0
— — — — — — —SWDTEN
(1)
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’
-n = Value at erase bit ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-1 Unimplemented: Read as ‘0’
bit 0
SWDTEN: Software Controlled Watchdog Timer Enable bit
(1)
1 = Watchdog Timer is on
0 = Watchdog Timer is off
Note 1: This bit has no effect if the Configuration bit, WDTEN, is enabled.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
RCON
IPEN SBOREN — RI TO PD POR BOR 64
WDTCON
— — — — — — —SWDTEN64
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.