Datasheet

 2010 Microchip Technology Inc. DS39635C-page 29
PIC18F6310/6410/8310/8410
PORTG is a bidirectional I/O port.
RG0/CCP3
RG0
CCP3
5
I/O
I/O
ST
ST
Digital I/O.
Capture 3 input/Compare 3 output/PWM3 output.
RG1/TX2/CK2
RG1
TX2
CK2
6
I/O
O
I/O
ST
—
ST
Digital I/O.
AUSART2 asynchronous transmit.
AUSART2 synchronous clock (see related RX2/DT2).
RG2/RX2/DT2
RG2
RX2
DT2
7
I/O
I
I/O
ST
ST
ST
Digital I/O.
AUSART2 asynchronous receive.
AUSART2 synchronous data (see related TX2/CK2).
RG3 8 I/O ST Digital I/O.
RG4 10 I/O ST Digital I/O.
RG5 See RG5/MCLR
/VPP pin.
PORTH is a bidirectional I/O port.
RH0/AD16
RH0
AD16
79
I/O
I/O
ST
TTL
Digital I/O.
External Memory Address/Data 16.
RH1/AD17
RH1
AD17
80
I/O
I/O
ST
TTL
Digital I/O.
External Memory Address/Data 17.
RH2/AD18
RH2
AD18
1
I/O
I/O
ST
TTL
Digital I/O.
External Memory Address/Data 18.
RH3/AD19
RH3
AD19
2
I/O
I/O
ST
TTL
Digital I/O.
External Memory Address/Data 19.
RH4 22 I/O ST Digital I/O.
RH5 21 I/O ST Digital I/O.
RH6 20 I/O ST Digital I/O.
RH7 19 I/O ST Digital I/O.
TABLE 1-3: PIC18F8310/8410 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P= Power I
2
C = ST with I
2
C™ or SMB levels
Note 1: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
2: Default assignment for CCP2 in all operating modes (CCP2MX is set).
3: Alternate assignment for CCP2 when CCP2MX is cleared (Microcontroller mode only).