Datasheet

 2010 Microchip Technology Inc. DS39635C-page 261
PIC18F6310/6410/8310/8410
20.2 Selecting and Configuring
Automatic Acquisition Time
The ADCON2 register allows the user to select an
acquisition time that occurs each time the GO/DONE
bit is set. It also gives users the option to use an auto-
matically determined acquisition time. Acquisition time
may be set with the ACQT<2:0> bits (ADCON2<5:3>),
which provides a range of 2 to 20 T
AD.
When the GO/DONE
bit is set, the A/D module contin-
ues to sample the input for the selected acquisition
time, then automatically begins a conversion.
Since the acquisition time is programmed, there may be
no need to wait for an acquisition time between selecting
a channel and setting the GO/DONE
bit. Manual acqui-
sition is selected when ACQT<2:0> = 000. When the
GO/DONE bit is set, sampling is stopped and a conver-
sion begins. The user is responsible for ensuring the
required acquisition time has passed between selecting
the desired input channel and setting the GO/DONE
bit.
This option is also the default Reset state of the
ACQT<2:0> bits and is compatible with devices that do
not offer programmable acquisition times.
In either case, when the conversion is completed, the
GO/DONE
bit is cleared, the ADIF flag is set and the
A/D begins sampling the currently selected channel
again. If an acquisition time is programmed, there is
nothing to indicate if the acquisition time has ended, or
if the conversion has begun.
20.3 Selecting the A/D Conversion
Clock
The A/D conversion time per bit is defined as TAD. The
A/D conversion requires 11 T
AD per 10-bit conversion.
The source of the A/D conversion clock is
software-selectable. There are seven possible options
for T
AD:
•2 T
OSC
•4 TOSC
•8 TOSC
•16 TOSC
•32 TOSC
•64 TOSC
• Internal RC Oscillator
For correct A/D conversions, the A/D conversion clock
(T
AD) must be as short as possible, but greater than the
minimum T
AD (approximately 2 s, see Parameter 130
for more information).
Table 20-1 shows the resultant TAD times derived from
the device operating frequencies and the A/D clock
source selected.
TABLE 20-1: TAD vs. DEVICE OPERATING FREQUENCIES
AD Clock Source (TAD) Maximum Device Frequency
Operation ADCS<2:0> PIC18F6X10/8X10 PIC18LF6X10/8X10
(4)
2 TOSC 000 1.25 MHz 666 kHz
4 TOSC 100 2.50 MHz 1.33 MHz
8 TOSC 001 5.00 MHz 2.66 MHz
16 T
OSC 101 10.0 MHz 5.33 MHz
32 TOSC 010 20.0 MHz 10.65 MHz
64 T
OSC 110 40.0 MHz 21.33 MHz
RC
(3)
x11 1.00 MHz
(1)
1.00 MHz
(2)
Note 1: The RC source has a typical TAD time of 4 s.
2: The RC source has a typical TAD time of 6 s.
3: For device frequencies above 1 MHz, the device must be in Sleep for the entire conversion or the A/D
accuracy may be out of specification.
4: Low-power (PIC18LFXXXX) devices only.