Datasheet

PIC18F6310/6410/8310/8410
DS39635C-page 26  2010 Microchip Technology Inc.
PORTD is a bidirectional I/O port.
RD0/AD0/PSP0
RD0
AD0
PSP0
72
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 0.
Parallel Slave Port data.
RD1/AD1/PSP1
RD1
AD1
PSP1
69
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 1.
Parallel Slave Port data.
RD2/AD2/PSP2
RD2
AD2
PSP2
68
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 2.
Parallel Slave Port data.
RD3/AD3/PSP3
RD3
AD3
PSP3
67
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 3.
Parallel Slave Port data.
RD4/AD4/PSP4
RD4
AD4
PSP4
66
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 4.
Parallel Slave Port data.
RD5/AD5/PSP5
RD5
AD5
PSP5
65
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 5.
Parallel Slave Port data.
RD6/AD6/PSP6
RD6
AD6
PSP6
64
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 6.
Parallel Slave Port data.
RD7/AD7/PSP7
RD7
AD7
PSP7
63
I/O
I/O
I/O
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 7.
Parallel Slave Port data.
TABLE 1-3: PIC18F8310/8410 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P= Power I
2
C = ST with I
2
C™ or SMB levels
Note 1: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
2: Default assignment for CCP2 in all operating modes (CCP2MX is set).
3: Alternate assignment for CCP2 when CCP2MX is cleared (Microcontroller mode only).