Datasheet

2010 Microchip Technology Inc. DS39635C-page 247
PIC18F6310/6410/8310/8410
FIGURE 19-2: ASYNCHRONOUS TRANSMISSION
FIGURE 19-3: ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
TABLE 19-4: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 63
PIR3 RC2IF TX2IF CCP3IF 65
PIE3
RC2IE TX2IE CCP3IE 65
IPR3
RC2IP TX2IP CCP3IP 65
RCSTA2
SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 66
TXREG2
AUSART2 Transmit Register 66
TXSTA2
CSRC TX9 TXEN SYNC BRGH TRMT TX9D 66
SPBRG2 AUSART2 Baud Rate Generator Register 66
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Word 1
Word 1
Transmit Shift Reg
Start bit bit 0 bit 1 bit 7/8
Write to TXREG2
BRG Output
(Shift Clock)
TX2 (pin)
TX2IF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
1 TCY
Word 1
Stop bit
Transmit Shift Reg.
Write to TXREG2
BRG Output
(Shift Clock)
TX2 (pin)
TX2IF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Word 2
Word 1
Word 2
Stop bit
Start bit
Transmit Shift Reg.
Word 1
Word 2
bit 0 bit 1
bit 7/8 bit 0
Note: This timing diagram shows two consecutive transmissions.
1 TCY
1 TCY
Start bit