Datasheet

PIC18F6310/6410/8310/8410
DS39635C-page 150  2010 Microchip Technology Inc.
FIGURE 11-4: PARALLEL SLAVE PORT READ WAVEFORMS
TABLE 11-19: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
PORTD RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 66
LATD LATD Output Latch Register 66
TRISD PORTD Data Direction Register 66
PORTE RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0 66
LATE LATE Output Latch Register 66
TRISE PORTE Data Direction Register 66
PSPCON IBF OBF IBOV PSPMODE
— — — — 65
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 63
PIR1 PSPIF ADIF RC1IF TX1IF SSPIF CCP1IF TMR2IF TMR1IF 65
PIE1 PSPIE ADIE RC1IE TX1IE SSPIE CCP1IE TMR2IE TMR1IE 65
IPR1 PSPIP
ADIP RC1IP TX1IP SSPIP CCP1IP TMR2IP TMR1IP 65
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Q1 Q2 Q3 Q4
CS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
WR
IBF
PSPIF
RD
OBF
PORTD<7:0>