Datasheet

 2010 Microchip Technology Inc. DS39635C-page 119
PIC18F6310/6410/8310/8410
REGISTER 10-9: PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
U-0 U-0 R-0 R-0 U-0 U-0 U-0 R/W-0
— — RC2IE TX2IE — — — CCP3IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5 RC2IE: AUSART Receive Interrupt Enable bit
1 = Enabled
0 =Disabled
bit 4 TX2IE: AUSART Transmit Interrupt Enable bit
1 = Enabled
0 =Disabled
bit 3-1 Unimplemented: Read as ‘0’
bit 0 CCP3IE: CCP3 Interrupt Enable bit
1 = Enabled
0 =Disabled