Datasheet

 2010 Microchip Technology Inc. DS39635C-page 63
PIC18F6310/6410/8310/8410
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Applicable
Devices
Power-on Reset,
Brown-out Reset
MCLR
Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
TOSU 6X10 8X10 ---0 0000 ---0 0000 ---0 uuuu
(3)
TOSH 6X10 8X10 0000 0000 0000 0000 uuuu uuuu
(3)
TOSL 6X10 8X10 0000 0000 0000 0000 uuuu uuuu
(3)
STKPTR 6X10 8X10 uu-0 0000 00-0 0000 uu-u uuuu
(3)
PCLATU 6X10 8X10 ---0 0000 ---0 0000 ---u uuuu
PCLATH 6X10 8X10 0000 0000 0000 0000 uuuu uuuu
PCL 6X10 8X10 0000 0000 0000 0000 PC + 2
(2)
TBLPTRU 6X10 8X10 --00 0000 --00 0000 --uu uuuu
TBLPTRH 6X10 8X10 0000 0000 0000 0000 uuuu uuuu
TBLPTRL 6X10 8X10 0000 0000 0000 0000 uuuu uuuu
TABLAT 6X10 8X10 0000 0000 0000 0000 uuuu uuuu
PRODH 6X10 8X10 xxxx xxxx uuuu uuuu uuuu uuuu
PRODL 6X10 8X10 xxxx xxxx uuuu uuuu uuuu uuuu
INTCON 6X10 8X10 0000 000x 0000 000u uuuu uuuu
(1)
INTCON2 6X10 8X10 1111 1111 1111 1111 uuuu uuuu
(1)
INTCON3 6X10 8X10 1100 0000 1100 0000 uuuu uuuu
(1)
INDF0 6X10 8X10 N/A N/A N/A
POSTINC0 6X10 8X10 N/A N/A N/A
POSTDEC0 6X10 8X10 N/A N/A N/A
PREINC0 6X10 8X10 N/A N/A N/A
PLUSW0 6X10 8X10 N/A N/A N/A
FSR0H 6X10 8X10 ---- xxxx ---- uuuu ---- uuuu
FSR0L 6X10 8X10 xxxx xxxx uuuu uuuu uuuu uuuu
WREG 6X10 8X10 xxxx xxxx uuuu uuuu uuuu uuuu
INDF1 6X10 8X10 N/A N/A N/A
POSTINC1 6X10 8X10 N/A N/A N/A
POSTDEC1 6X10 8X10 N/A N/A N/A
PREINC1 6X10 8X10 N/A N/A N/A
PLUSW1 6X10 8X10 N/A N/A N/A
FSR1H 6X10 8X10 ---- xxxx ---- uuuu ---- uuuu
FSR1L 6X10 8X10 xxxx xxxx uuuu uuuu uuuu uuuu
BSR 6X10 8X10 ---- 0000 ---- 0000 ---- uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 5-3 for Reset value for specific condition.
5: Bits, 6 and 7 of PORTA, LATA and TRISA, are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.