Datasheet

PIC18F6310/6410/8310/8410
DS39635C-page 374  2010 Microchip Technology Inc.
FIGURE 27-9: PROGRAM MEMORY WRITE TIMING DIAGRAM
TABLE 27-11: PROGRAM MEMORY WRITE TIMING REQUIREMENTS
Param.
No
Symbol Characteristics Min Typ Max Units
150 TadV2alL Address Out Valid to ALE (address setup time) 0.25 T
CY – 10 — — ns
151 TalL2adl ALE  to Address Out Invalid (address hold time) 5 — — ns
153 TwrH2adl WRn  to Data Out Invalid (data hold time) 5 — — ns
154 TwrL WRn Pulse Width 0.5 T
CY – 5 0.5 TCY —ns
156 TadV2wrH Data Valid before WRn (data setup time) 0.5 T
CY – 10 — — ns
157 TbsV2wrL Byte Select Valid before WRn (byte select setup
time)
0.25 T
CY ——ns
157A TwrH2bsI WRn  to Byte Select Invalid (byte select hold time) 0.125 T
CY – 5 — — ns
166 TalH2alH ALE  to ALE  (cycle time) — 0.25 T
CY —ns
171 TalH2csL Chip Enable Active to ALE  0.25 T
CY – 20 — — ns
171A TubL2oeH AD Valid to Chip Enable Active — — 10 ns
Q1 Q2 Q3 Q4 Q1 Q2
OSC1
ALE
Address
Data
156
150
151
153
AD<15:0>
Address
WRH or
WRL
UB or
LB
157
154
157A
Address
AD<19:16>
Address
BA0
166
CE
171
171A