Datasheet

 2010 Microchip Technology Inc. DS39635C-page 3
PIC18F6310/6410/8310/8410
Power-Managed Modes:
• Run: CPU on, Peripherals on
• Idle: CPU off, Peripherals on
• Sleep: CPU off, Peripherals off
• Ultra Low 50 nA Input Leakage
• Idle mode Currents Down to 2.3 A Typical
• Ultra Low 50 nA Input Leakage
• Sleep mode Currents Down to 0.1 A Typical
• Timer1 Oscillator: 1.0 A, 32 kHz, 2V Typical
• Watchdog Timer: 1.7 A Typical
• Two-Speed Oscillator Start-up
Flexible Oscillator Structure:
• Four Crystal modes up to 40 MHz
• 4x Phase Lock Loop (available for crystal and
internal oscillators)
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal Oscillator Block:
- Fast wake from Sleep and Idle, 1 s typical
- 8 user-selectable frequencies, from 31 kHz to
8MHz
- Provides a complete range of clock speeds,
from 31 kHz to 32 MHz, when used with PLL
- User-tunable to compensate for frequency drift
• Secondary Oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
- Allows for safe shutdown if peripheral clock stops
External Memory Interface
(PIC18F8310/8410 Devices only):
• Address Capability of up to 2 Mbytes
• 16-Bit/8-Bit Interface
Peripheral Highlights:
• High-Current Sink/Source 25 mA/25 mA
• Four External Interrupts
• Four Input Change Interrupts
• Four 8-Bit/16-Bit Timer/Counter modules
• Up to 3 Capture/Compare/PWM (CCP) modules
Peripheral Highlights (Continued):
• Master Synchronous Serial Port (MSSP) module
Supporting 3-Wire SPI (all 4 modes) and I
2
C™
Master and Slave modes
• Addressable USART module:
- Supports RS-485 and RS-232
• Enhanced Addressable USART module:
- Supports RS-485, RS-232 and LIN/J2602
- Auto-Wake-up on Start bit
- Auto-Baud Detect
• 10-Bit, up to 12-Channel Analog-to-Digital (A/D)
Converter module:
- Auto-acquisition capability
- Conversion available during Sleep
• Dual Analog Comparators with Input Multiplexing
• Programmable 16-Level High/Low-Voltage
Detection (HLVD) module:
- Supports interrupt on High/Low-Voltage Detection
Special Microcontroller Features:
• C Compiler Optimized Architecture:
- Optional extended instruction set designed to
optimize re-entrant code
• 1000 Erase/Write Cycle Flash Program Memory
Typical
• Flash Retention: 100 Years Typical
• Priority Levels for Interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
- 2% stability over V
DD and temperature
• In-Circuit Serial Programming™ (ICSP™) via
Two Pins
• In-Circuit Debug (ICD) via Two Pins
• Wide Operating Voltage Range: 2.0V to 5.5V
• Programmable Brown-out Reset (BOR) with
Software Enable Option
Device
Program Memory
(On-Board/External)
Data
Memory
I/O
10-Bit
A/D (ch)
CCP
(PWM)
MSSP
EUSART/
AUSART
Comparators
Timers
8/16-Bit
Ext.
Bus
Flash
(bytes)
# Single-Word
Instructions
SRAM
(bytes)
SPI
Master
I
2
C™
PIC18F6310 8K/0 4096/0 768 54 12 3 Y Y 1/1 2 1/3 N
PIC18F6410 16K/0 8192/0 768 54 12 3 Y Y 1/1 2 1/3 N
PIC18F8310 8K/2M 4096/1M 768 70 12 3 Y Y 1/1 2 1/3 Y
PIC18F8410 16K/2M 8192/1M 768 70 12 3 Y Y 1/1 2 1/3 Y
64/80-Pin Flash Microcontrollers with nanoWatt Technology