Datasheet

 2010 Microchip Technology Inc. DS39635C-page 287
PIC18F6310/6410/8310/8410
REGISTER 24-6: CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
R/P-1 R/P-0 U-0 U-0 U-0 U-0 U-0 R/P-1
DEBUG
XINST — — — — —STVREN
bit 7 bit 0
Legend:
R = Readable bit C = Clearable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed bit u = Unchanged from programmed state
bit 7
DEBUG
: Background Debugger Enable bit
1 = Background debugger is disabled, RB6 and RB7 are configured as general purpose I/O pins
0 = Background debugger is enabled, RB6 and RB7 are dedicated to In-Circuit Debug
bit 6 XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode are enabled
0 = Instruction set extension and Indexed Addressing mode are disabled (Legacy mode)
bit 5-1 Unimplemented: Read as ‘0
bit 0 STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause a Reset
0 = Stack full/underflow will not cause a Reset
REGISTER 24-7: CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/C-1
— — — — — — —CP
bit 7 bit 0
Legend:
R = Readable bit C = Clearable bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed bit u = Unchanged from programmed state
bit 7-1 Unimplemented: Read as ‘0
bit 0 CP: Code Protection bit
1 = Program memory block is not code-protected
0 = Program memory block is code-protected