Datasheet

 2010 Microchip Technology Inc. DS39635C-page 27
PIC18F6310/6410/8310/8410
PORTE is a bidirectional I/O port.
RE0/AD8/RD
RE0
AD8
RD
4
I/O
I/O
I
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 8.
Read control for Parallel Slave Port.
RE1/AD9/WR
RE1
AD9
WR
3
I/O
I/O
I
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 9.
Write control for Parallel Slave Port.
RE2/AD10/CS
RE2
AD10
CS
78
I/O
I/O
I
ST
TTL
TTL
Digital I/O.
External Memory Address/Data 10.
Chip Select control for Parallel Slave Port.
RE3/AD11
RE3
AD11
77
I/O
I/O
ST
TTL
Digital I/O.
External Memory Address/Data 11.
RE4/AD12
RE4
AD12
76
I/O
I/O
ST
TTL
Digital I/O.
External Memory Address/Data 12.
RE5/AD13
RE5
AD13
75
I/O
I/O
ST
TTL
Digital I/O.
External Memory Address/Data 13.
RE6/AD14
RE6
AD14
74
I/O
I/O
ST
TTL
Digital I/O.
External Memory Address/Data 14.
RE7/CCP2/AD15
RE7
CCP2
(3)
AD15
73
I/O
I/O
I/O
ST
ST
TTL
Digital I/O.
Capture 2 input/Compare 2 output/PWM2 output.
External Memory Address/Data 15.
TABLE 1-3: PIC18F8310/8410 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P= Power I
2
C = ST with I
2
C™ or SMB levels
Note 1: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
2: Default assignment for CCP2 in all operating modes (CCP2MX is set).
3: Alternate assignment for CCP2 when CCP2MX is cleared (Microcontroller mode only).