Datasheet

2010 Microchip Technology Inc. DS39635C-page 251
PIC18F6310/6410/8310/8410
FIGURE 19-7: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
TABLE 19-6: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
INTCON GIE/GIEH PEIE/GIEL
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 63
PIR3 RC2IF TX2IF CCP3IF 65
PIE3
RC2IE TX2IE CCP3IE 65
IPR3 RC2IP TX2IP CCP3IP 65
RCSTA2 SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 66
TXREG2 AUSART2 Transmit Register 66
TXSTA2 CSRC TX9 TXEN SYNC
BRGH TRMT TX9D 66
SPBRG2 AUSART2 Baud Rate Generator Register 66
Legend: — = unimplemented, read as ‘0. Shaded cells are not used for synchronous master transmission.
RX2/DT2 Pin
TX2/CK2 Pin
Write to
TXREG2 Reg
TX2IF bit
TRMT bit
bit 0 bit 1 bit 2 bit 6 bit 7
TXEN bit