Datasheet

 2010 Microchip Technology Inc. DS39635C-page 227
PIC18F6310/6410/8310/8410
FIGURE 18-3: EUSART TRANSMIT BLOCK DIAGRAM
FIGURE 18-4: ASYNCHRONOUS TRANSMISSION
FIGURE 18-5: ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
TX1IF
TX1IE
Interrupt
TXEN
Baud Rate CLK
SPBRG1
Baud Rate Generator
TX9D
MSb
LSb
Data Bus
TXREG1 Register
TSR Register
(8)
0
TX9
TRMT
SPEN
TX1 pin
Pin Buffer
and Control
8

SPBRGH1
BRG16
Word 1
Word 1
Transmit Shift Reg
Start bit bit 0 bit 1 bit 7/8
Write to TXREG1
BRG Output
(Shift Clock)
TX1 (pin)
TX1IF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
1 TCY
Word 1
Stop bit
Transmit Shift Reg.
Write to TXREG1
BRG Output
(Shift Clock)
TX1 (pin)
TX1IF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Word 2
Word 1
Word 2
Stop bit
Start bit
Transmit Shift Reg.
Word 1
Word 2
bit 0 bit 1
bit 7/8 bit 0
Note: This timing diagram shows two consecutive transmissions.
1 TCY
1 TCY
Start bit