Datasheet

 2010 Microchip Technology Inc. DS39635C-page 21
PIC18F6310/6410/8310/8410
PORTG is a bidirectional I/O port.
RG0/CCP3
RG0
CCP3
3
I/O
I/O
ST
ST
Digital I/O.
Capture 3 input/Compare 3 output/PWM3 output.
RG1/TX2/CK2
RG1
TX2
CK2
4
I/O
O
I/O
ST
—
ST
Digital I/O.
AUSART2 asynchronous transmit.
AUSART2 synchronous clock (see related RX2/DT2).
RG2/RX2/DT2
RG2
RX2
DT2
5
I/O
I
I/O
ST
ST
ST
Digital I/O.
AUSART2 asynchronous receive.
AUSART2 synchronous data (see related TX2/CK2).
RG3 6 I/O ST Digital I/O.
RG4 8 I/O ST Digital I/O.
RG5 See RG5/MCLR
/VPP pin.
VSS 9, 25, 41, 56 P — Ground reference for logic and I/O pins.
VDD 10, 26, 38, 57 P — Positive supply for logic and I/O pins.
AV
SS 20 P — Ground reference for analog modules.
AVDD 19 P — Positive supply for analog modules.
TABLE 1-2: PIC18F6310/6410 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P= Power I
2
C = ST with I
2
C™ or SMB levels
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.