Datasheet

PIC18F6310/6410/8310/8410
DS39635C-page 14  2010 Microchip Technology Inc.
TABLE 1-2: PIC18F6310/6410 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
RG5/MCLR/VPP
RG5
MCLR
VPP
7
I
I
P
ST
ST
Master Clear (input) or programming voltage (input).
Digital input.
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
Programming voltage input.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
39
I
I
I/O
ST
CMOS
TTL
Oscillator crystal or external clock input.
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode, CMOS
otherwise.
External clock source input. Always associated
with pin function, OSC1. (See related OSC1/CLKI,
OSC2/CLKO pins.)
General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
40
O
O
I/O
—
—
TTL
Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO, which has
1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
General purpose I/O pin.
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P= Power I
2
C = ST with I
2
C™ or SMB levels
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.