Datasheet

PIC18F6310/6410/8310/8410
DS39635C-page 138  2010 Microchip Technology Inc.
TABLE 11-9: PORTE FUNCTIONS
Pin Name Function
TRIS
Setting
I/O
I/O
Type
Description
RE0/AD8/RD
RE0 0 O DIG LATE<0> data output.
1 I ST PORTE<0> data input.
AD8
(3)
x O DIG External memory interface, Address/Data Bit 8 output.
(2)
x I TTL External memory interface, Data Bit 8 input.
(2)
RD 1 I TTL Parallel Slave Port read enable control input.
RE1/AD9/WR
RE1 0 O DIG LATE<1> data output.
1 I ST PORTE<1> data input.
AD9
(3)
x O DIG External memory interface, Address/Data Bit 9 output.
(2)
x I TTL External memory interface, Data Bit 9 input.
(2)
WR 1 I TTL Parallel Slave Port write enable control input.
RE2/AD10/CS
RE2 0 O DIG LATE<2> data output.
1 I ST PORTE<2> data input.
AD10
(3)
x O DIG External memory interface, Address/Data Bit 10 output.
(2)
x I TTL External memory interface, Data Bit 10 input.
(2)
CS 1 I TTL Parallel Slave Port chip select control input.
RE3/AD11 RE3 0 O DIG LATE<3> data output.
1 I ST PORTE<3> data input.
AD11
(3)
x O DIG External memory interface, Address/Data Bit 11 output.
(2)
x I TTL External memory interface, Data Bit 11 input.
(2)
RE4/AD12 RE4 0 O DIG LATE<4> data output.
1 I ST PORTE<4> data input.
AD12
(3)
x O DIG External memory interface, Address/Data Bit 12 output.
(2)
x I TTL External memory interface, Data Bit 12 input.
(2)
RE5/AD13 RE5 0 O DIG LATE<5> data output.
1 I ST PORTE<5> data input.
AD13
(3)
x O DIG External memory interface, Address/Data Bit 13 output.
(2)
x I TTL External memory interface, Data Bit 13 input.
(2)
RE6/AD14 RE6 0 O DIG LATE<6> data output.
1 I ST PORTE<6> data input.
AD14
(3)
x O DIG External memory interface, Address/Data Bit 14 output.
(2)
x I TTL External memory interface, Data Bit 14 input.
(2)
RE7/CCP2/AD15 RE7 0 O DIG LATE<7> data output.
1 I ST PORTE<7> data input.
CCP2
(1)
0 O DIG CCP2 compare output and CCP2 PWM output; takes priority over port data.
1 I ST CCP2 capture input.
AD15
(3)
x O DIG External memory interface, Address/Data Bit 15 output.
(2)
x I TTL External memory interface, Data Bit 15 input.
(2)
Legend: O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared (all devices in Microcontroller mode).
2: External memory interface I/O takes priority over all other digital and PSP I/O.
3: Implemented on 80-pin devices only.