Datasheet
2010 Microchip Technology Inc. DS39635C-page 127
PIC18F6310/6410/8310/8410
TABLE 11-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
PORTA RA7
(1)
RA6
(1)
RA5 RA4 RA3 RA2 RA1 RA0 66
LATA LATA7
(1)
LATA6
(1)
LATA Output Latch Register 66
TRISA TRISA7
(1)
TRISA6
(1)
PORTA Data Direction Register 66
ADCON1 — — VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 64
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTA.
Note 1: RA<7:6> and their associated latch and data direction bits are enabled as I/O pins based on oscillator
configuration; otherwise, they are read as ‘0’.