Datasheet

PIC18F6310/6410/8310/8410
DS39635C-page 122  2010 Microchip Technology Inc.
REGISTER 10-12: IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
U-0 U-0 R-1 R-1 U-0 U-0 U-0 R/W-1
— — RC2IP TX21P — — — CCP3IP
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5 RC2IP: AUSART Receive Priority Flag bit
1 = High priority
0 = Low priority
bit 4 TX2IP: AUSART Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3-1 Unimplemented: Read as ‘0’
bit 0 CCP3IP: CCP3 Interrupt Priority bit
1 = High priority
0 = Low priority