Datasheet

PIC18F47J53 FAMILY
DS39964B-page 72 Preliminary  2010 Microchip Technology Inc.
INDF2 PIC18F2XJ53 PIC18F4XJ53 N/A N/A N/A
POSTINC2 PIC18F2XJ53 PIC18F4XJ53 N/A N/A N/A
POSTDEC2 PIC18F2XJ53 PIC18F4XJ53 N/A N/A N/A
PREINC2 PIC18F2XJ53 PIC18F4XJ53 N/A N/A N/A
PLUSW2 PIC18F2XJ53 PIC18F4XJ53 N/A N/A N/A
FSR2H PIC18F2XJ53 PIC18F4XJ53 ---- 0000 ---- 0000 ---- uuuu
FSR2L PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
STATUS PIC18F2XJ53 PIC18F4XJ53 ---x xxxx ---u uuuu ---u uuuu
TMR0H PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
TMR0L PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
T0CON PIC18F2XJ53 PIC18F4XJ53 1111 1111 1111 1111 uuuu uuuu
OSCCON PIC18F2XJ53 PIC18F4XJ53 0110 qq00 0110 qq00 0110 qq0u
CM1CON PIC18F2XJ53 PIC18F4XJ53 0001 1111 uuuu uuuu uuuu uuuu
CM2CON PIC18F2XJ53 PIC18F4XJ53 0001 1111 uuuu uuuu uuuu uuuu
RCON
(4)
PIC18F2XJ53 PIC18F4XJ53 0-11 11qq 0-qq qquu u-qq qquu
TMR1H PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
TMR1L PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
T1CON PIC18F2XJ53 PIC18F4XJ53 0000 0000 u0uu uuuu uuuu uuuu
TMR2 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
PR2 PIC18F2XJ53 PIC18F4XJ53 1111 1111 1111 1111 uuuu uuuu
T2CON PIC18F2XJ53 PIC18F4XJ53 -000 0000 -000 0000 -uuu uuuu
SSP1BUF PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
SSP1ADD PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
SSP1MSK PIC18F2XJ53 PIC18F4XJ53 ---- ---- uuuu uuuu uuuu uuuu
SSP1STAT PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
SSP1CON1 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
SSP1CON2 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
ADRESH PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
ADRESL PIC18F2XJ53 PIC18F4XJ53 xxxx xxxx uuuu uuuu uuuu uuuu
ADCON0 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
ADCON1 PIC18F2XJ53 PIC18F4XJ53 0000 0000 0000 0000 uuuu uuuu
WDTCON PIC18F2XJ53 PIC18F4XJ53 1qq0 0000 0qq0 0000 uqqu uuuu
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register Applicable Devices
Power-on Reset,
Brown-out Reset,
Wake From Deep
Sleep
MCLR
Resets
WDT Reset
RESET Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.
5: Not implemented for PIC18F2XJ53 devices.
6: Not implemented for “LF” devices.