Datasheet

 2010 Microchip Technology Inc. Preliminary DS39974A-page 29
PIC18F47J13 FAMILY
PORTE is a bidirectional I/O port.
RE0/AN5/PMRD
RE0
AN5
PMRD
25 25
I/O
I
I/O
ST/DIG
Analog
ST/TTL/
DIG
Digital I/O.
Analog Input 5.
Parallel Master Port input/output.
RE1/AN6/PMWR
RE1
AN6
PMWR
26 26
I/O
I
I/O
ST/DIG
Analog
ST/TTL/
DIG
Digital I/O.
Analog Input 6.
Parallel Master Port write strobe.
RE2/AN7/PMCS
RE2
AN7
PMCS
27 27
I/O
I
O
ST/DIG
Analog
DIG
Digital I/O.
Analog Input 7.
Parallel Master Port byte enable.
V
SS1 6 6 P — Ground reference for logic and I/O pins.
V
SS23129——
AVSS1 30 — P — Ground reference for analog modules.
VDD1 8 7 P — Positive supply for peripheral digital logic and
I/O pins.
V
DD22928P—
VDDCORE/VCAP
VDDCORE
VCAP
23 23
P
P
—
—
Core logic power or external filter capacitor
connection.
Positive supply for microcontroller core logic
(regulator disabled).
External filter capacitor connection (regulator
enabled).
AV
DD1 7 — P — Positive supply for analog modules.
AVDD2 28 — — — Positive supply for analog modules.
TABLE 1-4: PIC18F4XJ13 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
44-
QFN
44-
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
DIG = Digital output I
2
C™ = Open-Drain, I
2
C specific
Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
2: Available only on 44-pin devices (PIC18F46J13, PIC18F47J13, PIC18LF46J13 and PIC18LF47J13).
3: 5.5V tolerant.