Datasheet

PIC18F47J53 FAMILY
DS39964B-page 98 Preliminary 2010 Microchip Technology Inc.
F53h CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 0000 0000
F52h CCPTMRS0 C3TSEL1 C3TSEL0 C2TSEL2 C2TSEL1 C2TSEL0 C1TSEL2 C1TSEL1 C1TSEL0 0000 0000
F51h CCPTMRS1 C7TSEL1 C7TSEL0
C6TSEL0 C5TSEL0 C4TSEL1 C4TSEL0 00-0 -000
F50h CCPTMRS2
C10TSEL0
(3)
C9TSEL0
(3)
C8TSEL1 C8TSEL0 ---0 -000
F4Fh DSGPR1 Deep Sleep Persistent General Purpose Register (contents retained even in deep sleep) xxxx xxxx
F4Eh DSGPR0 Deep Sleep Persistent General Purpose Register (contents retained even in deep sleep) xxxx xxxx
F4Dh DSCONH DSEN
r DSULPEN RTCWDIS 0--- -000
F4Ch DSCONL
ULPWDIS DSBOR RELEASE ---- -000
F4Bh DSWAKEH
—DSINT0---- ---0
F4Ah DSWAKEL DSFLT
DSULP DSWDT DSRTC DSMCLR DSPOR 0-00 00-1
F49h ANCON1 VBGEN
PCFG12 PCFG11 PCFG10 PCFG9 PCFG8 0--0 0000
F48h ANCON0 PCFG7
(1)
PCFG6
(1)
PCFG5
(1)
PCFG4 PCFG3 PCFG2 PCFG1 PCFG0 0000 0000
F47h OEDCON ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0 0000 0000
F46h ALRMRPT ARPT7 ARPT6 ARPT5 ARPT4 ARPT3 ARPT2 ARPT1 ARPT0 0000 0000
F45h ALRMVALH Alarm Value High Register Window based on ALRMPTR<1:0> xxxx xxxx
F44h ALRMVALL Alarm Value Low Register Window based on ALRMPTR<1:0> xxxx xxxx
F43h
---- ----
F42h ODCON1 CCP8OD CCP7OD CCP6OD CCP5OD CCP4OD ECCP3OD ECCP2OD ECCP1OD 0000 0000
F41h ODCON2
CCP10OD CCP9OD U2OD U1OD ---- 0000
F40h ODCON3
SPI2OD SPI1OD ---- --00
F3Fh RTCCFG RTCEN
RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0 0-00 0000
F3Eh RTCCAL CAL7 CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 0000 0000
F3Dh REFOCON ROON
ROSSLP ROSEL RODIV3 RODIV2 RODIV1 RODIV0 0-00 0000
F3Ch PADCFG1
RTSECSEL1 RTSECSEL0 PMPTTL
(1)
---- -000
F3Bh RTCVALH RTCC Value High Register Window Based on RTCPTR<1:0> 0xxx xxxx
F3Ah RTCVALL RTCC Value Low Register Window Based on RTCPTR<1:0> 0xxx xxxx
F39h UCFG UTEYE UOEMON
UPUEN UTRDIS FSEN PPB1 PPB0 00-0 0000
F38h UADDR
ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 -000 0000
F37h UEIE BTSEE
BTOEE DFN8EE CRC16EE CRC5EE PIDEE 0--0 0000
F36h UIE
SOFIE STALLIE IDLEIE TRNIE ACTVIE UERRIE URSTIE -000 0000
F35h UEP15
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F34h UEP14
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F33h UEP13
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F32h UEP12
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F31h UEP11
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F30h UEP10
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F2Fh UEP9
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F2Eh UEP8
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F2Dh UEP7
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F2Ch UEP6
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F2Bh UEP5
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F2Ah UEP4
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F29h UEP3
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F28h UEP2
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F27h UEP1
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F26h UEP0
EPHSHK EPCONDIS EPOUTEN EPINEN EPSTALL ---0 0000
F25h CM3CON CON COE CPOL EVPOL1 EVPOL0 CREF CCH1 CCH0 0001 1111
F24h TMR5H Timer5 Register High Byte xxxx xxxx
TABLE 6-4: REGISTER FILE SUMMARY (PIC18F47J53 FAMILY) (CONTINUED)
Addr. File Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved, do not modify
Note 1: Implemented only for 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53).
2: Implemented only for 28-pin devices (PIC18F26J53, PIC18F27J53, PIC18LF26J53 and PIC18LF27J53).
3: Implemented only for devices with 128 Kbyte of program memory (PIC18F27J53, PIC18F47J53, PIC18LF27J53 and PIC18LF47J53).