Datasheet

 2011 Microchip Technology Inc. DS39931D-page 69
PIC18F46J50 FAMILY
TABLE 5-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register Applicable Devices
Power-on Reset,
Brown-out Reset,
Wake From Deep
Sleep
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
TOSU PIC18F2XJ50 PIC18F4XJ50 ---0 0000 ---0 0000 ---u uuuu
(1)
TOSH PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
(1)
TOSL PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
(1)
STKPTR PIC18F2XJ50 PIC18F4XJ50 00-0 0000 uu-0 0000 uu-u uuuu
(1)
PCLATU PIC18F2XJ50 PIC18F4XJ50 ---0 0000 ---0 0000 ---u uuuu
PCLATH PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PCL PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 PC + 2
(2)
TBLPTRU PIC18F2XJ50 PIC18F4XJ50 --00 0000 --00 0000 --uu uuuu
TBLPTRH PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
TBLPTRL PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
TABLAT PIC18F2XJ50 PIC18F4XJ50 0000 0000 0000 0000 uuuu uuuu
PRODH PIC18F2XJ50 PIC18F4XJ50 xxxx xxxx uuuu uuuu uuuu uuuu
PRODL PIC18F2XJ50 PIC18F4XJ50 xxxx xxxx uuuu uuuu uuuu uuuu
INTCON PIC18F2XJ50 PIC18F4XJ50 0000 000x 0000 000u uuuu uuuu
(3)
INTCON2 PIC18F2XJ50 PIC18F4XJ50 1111 1111 1111 1111 uuuu uuuu
(3)
INTCON3 PIC18F2XJ50 PIC18F4XJ50 1100 0000 1100 0000 uuuu uuuu
(3)
INDF0 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
POSTINC0 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
POSTDEC0 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
PREINC0 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
PLUSW0 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
FSR0H PIC18F2XJ50 PIC18F4XJ50 ---- 0000 ---- 0000 ---- uuuu
FSR0L PIC18F2XJ50 PIC18F4XJ50 xxxx xxxx uuuu uuuu uuuu uuuu
WREG PIC18F2XJ50 PIC18F4XJ50 xxxx xxxx uuuu uuuu uuuu uuuu
INDF1 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
POSTINC1 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
POSTDEC1 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
PREINC1 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
PLUSW1 PIC18F2XJ50 PIC18F4XJ50 N/A N/A N/A
FSR1H PIC18F2XJ50 PIC18F4XJ50 ---- 0000 ---- 0000 ---- uuuu
FSR1L PIC18F2XJ50 PIC18F4XJ50 xxxx xxxx uuuu uuuu uuuu uuuu
BSR PIC18F2XJ50 PIC18F4XJ50 ---- 0000 ---- 0000 ---- uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1: When the wake-up is due to an interrupt and the GIEH (and GIEL if low priority) bit(s) are set, the TOSU,
TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the
next location in the hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Tabl e 5 - 1 for Reset value for specific condition.
5: Not implemented on PIC18F2XJ50 devices.
6: Not implemented on “LF” devices.