Datasheet

 2011 Microchip Technology Inc. DS39931D-page 511
PIC18F46J50 FAMILY
TABLE 30-11: PLL CLOCK TIMING SPECIFICATIONS (VDDCORE = 2.35V TO 2.75V)
TABLE 30-12: INTERNAL RC ACCURACY (INTOSC AND INTRC SOURCES)
Param
No.
Sym Characteristic Min Typ Max Units Conditions
F10 F
PLLIN PLL Input Frequency Range — 4
(1)
—MHz
F11 F
PLLO PLL Output Frequency (24x FPLLIN)—96—MHz
F12 t
rc
PLL Start-up Time (lock time) — — 2 ms
Note 1: PLL is designed for 4 MHz input frequency, but can accept 4 MHz to 48 MHz inputs using the PLL input prescaler.
Param
No.
Device Min Typ Max Units Conditions
INTOSC Accuracy @ Freq = 8 MHz,
4 MHz, 2 MHz, 1 MHz, 500 kHz, 250 kHz, 125 kHz, 31 kHz
(1)
All Devices
-1 +/-0.15 +1 % 0°C to +85°C V
DD = 2.4V-3.6V
V
DDCORE = 2.3V-2.7V
-1 +/-0.25 +1 % -40°C to +85°C VDD = 2.0V-3.6V
V
DDCORE = 2.0V-2.7V
INTRC Accuracy @ Freq = 31 kHz
(1)
All Devices 20.3 — 42.2 kHz -40°C to +85°C VDD = 2.0V-3.6V
V
DDCORE = 2.0V-2.7V
Note 1: The accuracy specification of the 31 kHz clock is determined by which source is providing it at a given time.
When INTSRC (OSCTUNE<7>) is ‘1’, use the INTOSC accuracy specification. When INTSRC is ‘0’, use
the INTRC accuracy specification.