Datasheet

 2011 Microchip Technology Inc. DS39931D-page 23
PIC18F46J50 FAMILY
PORTA is a bidirectional I/O port.
RA0/AN0/C1INA/ULPWU/PMA6/
RP0
RA0
AN0
C1INA
ULPWU
PMA6
RP0
19 19
I/O
I
I
I
O
I/O
DIG
Analog
Analog
Analog
DIG
DIG
Digital I/O.
Analog Input 0.
Comparator 1 Input A.
Ultra Low-Power Wake-up input.
Parallel Master Port digital output.
Remappable Peripheral Pin 0 input/output.
RA1/AN1/C2INA/PMA7/RP1
RA1
AN1
C2INA
PMA7
RP1
20 20
I
O
I
O
I/O
DIG
Analog
Analog
DIG
DIG
Digital I/O.
Analog Input 1.
Comparator 2 Input A.
Parallel Master Port digital output.
Remappable Peripheral Pin 1 input/output.
RA2/AN2/V
REF-/CVREF/C2INB
RA2
AN2
V
REF-
CV
REF
C2INB
21 21
I/O
I
O
I
I
DIG
Analog
Analog
Analog
Analog
Digital I/O.
Analog Input 2.
A/D reference voltage (low) input.
Comparator reference voltage output.
Comparator 2 Input B.
RA3/AN3/V
REF+/C1INB
RA3
AN3
V
REF+
C1INB
22 22
I/O
I
I
I
DIG
Analog
Analog
Analog
Digital I/O.
Analog Input 3.
A/D reference voltage (high) input.
Comparator 1 Input B.
RA5/AN4/SS1
/HLVDIN/RCV/RP2
RA5
AN4
SS1
HLVDIN
RCV
RP2
24 24
I/O
I
I
I
I
I/O
DIG
Analog
TTL
Analog
Analog
DIG
Digital I/O.
Analog Input 4.
SPI slave select input.
Low-Voltage Detect (LVD) input.
External USB transceiver RCV input.
Remappable Peripheral Pin 2 input/output.
RA6
(1)
RA7
(1)
See the OSC2/CLKO/RA6 pin.
See the OSC1/CLKI/RA7 pin.
TABLE 1-4: PIC18F4XJ50 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
44-
QFN
44-
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
DIG = Digital output I
2
C™ = Open-Drain, I
2
C-specific
Note 1: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.