Datasheet

 2011 Microchip Technology Inc. DS39931D-page 147
PIC18F46J50 FAMILY
TABLE 10-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
RD3/PMD3/
RP20
RD3 1 I DIG PORTD<3> data input.
0 O DIG LATD<3> data output.
PMD3 1 I ST/TTL Parallel Master Port data in.
0 O DIG Parallel Master Port data out.
RP20 1 I ST Remappable Peripheral Pin 20 input.
0 O DIG Remappable Peripheral Pin 20 output.
RD4/PMD4/
RP21
RD4 1 I ST PORTD<4> data input.
0 O DIG LATD<4> data output.
PMD4 1 I ST/TTL Parallel Master Port data in.
0 O DIG Parallel Master Port data out.
RP21 1 I ST Remappable Peripheral Pin 21 input.
0 O DIG Remappable Peripheral Pin 21 output.
RD5/PMD5/
RP22
RD5 1 I ST PORTD<5> data input.
0 O DIG LATD<5> data output.
PMD5 1 I ST/TTL Parallel Master Port data in.
0 O DIG Parallel Master Port data out.
RP22 1 I ST Remappable Peripheral Pin 22 input.
0 O DIG Remappable Peripheral Pin 22 output.
RD6/PMD6/
RP23
RD6 1 I ST PORTD<6> data input.
0 O DIG LATD<6> data output.
PMD6 1 I ST/TTL Parallel Master Port data in.
0 O DIG Parallel Master Port data out.
RP23 1 I ST Remappable Peripheral Pin 23 input.
0 O DIG Remappable Peripheral Pin 23 output.
RD7/PMD7/
RP24
RD7 1 I ST PORTD<7> data input.
0 O DIG LATD<7> data output.
PMD7 1 I ST/TTL Parallel Master Port data in.
0 O DIG Parallel Master Port data out.
RP24 1 I ST Remappable Peripheral Pin 24 input.
0 O DIG Remappable Peripheral Pin 24 output.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
PORTD
(1)
RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 92
LATD
(1)
LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0 92
TRISD
(1)
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 92
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTD.
Note 1: These registers are not available on 28-pin devices.
TABLE 10-9: PORTD I/O SUMMARY (CONTINUED)
Pin Function
TRIS
Setting
I/O
I/O
Type
Description
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; I
2
C/SMB = I
2
C/SMBus
input buffer; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).